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參數(shù)資料
| 型號： | IDT821068PX |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 編解碼器 |
| 英文描述： | OCTAL PROGRAMMABLE PCM CODEC |
| 中文描述： | A/MU-LAW, PROGRAMMABLE CODEC, PQFP128 |
| 封裝： | PLASTIC, QFP-128 |
| 文件頁數(shù)： | 23/45頁 |
| 文件大?。?/td> | 589K |
| 代理商： | IDT821068PX |
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INDUSTRIAL TEMPERATURE RANGE
IDT821068 OCTAL PROGRAMMABLE PCM CODEC
23
COMMANDS LIST
NOTES:
1.
R
/W = 0, Read command;
R
/W = 1, Write command
2.
“R”
in the command means that bit is reserved for future use, it must be fill in ‘0’ in write operation and be ignored in read operation.
3. The following commands are available for both MPI and GCI mode except for those with special statement.
Global Commands:
1. No Operation (A0H), Write Only
When executing this command, a data byte (FFH) must follow to ensure proper operation.
2. Read Version Number (20H), Read Only
By executing this read command, users can get the version number of the IDT821068. The default value is 1(d).
3. Software Reset (A2H), Write Only
This command resets all Local Registers, but does not reset Global Registers and RAMs. When executing this command, a data byte (FFH)
must follow to ensure proper operation.
4. Hardware Reset (A3H), Write Only
The action of this command is equivalent to pulling the
RESET
pin low (Refer to Page 22 for information about
RESET
operation). When
executing this command, a data byte (FFH) must follow to ensure proper operation.
5. MCLK Select (24H/A4H), Read/Write. (This command is for MPI mode only.)
In MPI mode, this command is used to determine the frequency of Master Clock, which is used by the DSP. There are 9 frequencies can be
selected, the default value is 2.048MHz.
Sel [3:0] = 0000:
8.192 MHz
Sel [3:0] = 0001:
4.096 MHz
Sel [3:0] = 0010:
2.048 MHz (default)
Sel [3:0] = 0110:
1.536 MHz
Sel [3:0] = 1110:
1.544 MHz
Sel [3:0] = 0101:
3.072 MHz
Sel [3:0] = 1101:
3.088 MHz
Sel [3:0] = 0100:
6.144 MHz
Sel [3:0] = 1100:
6.176 MHz
(In GCI mode, the frequency of MCLK is the same as that of DCL, which is determined by the CI/DOUBLE pin. Refer to “Pin Description” on
Page 4 for further detail.)
6. Channel Program Enable (25H/A5H), Read/Write. (This command is for MPI mode only.)
Channel Program Enable command is used to specify the channel(s) before Local Commands or a Coe-RAM Commands are executed.
This command byte provides one bit per channel to indicate if the channel can receive Local Commands and Coe-RAM Commands.
CE[0] = 0: Disabled, Channel 1 can not receive Local Commands and Coe-RAM Commands (default);
CE[0] = 1: Enabled, Channel 1 can receive Local Commands and Coe-RAM Commands.
b7
0
b6
0
b5
1
b4
0
b3
0
b2
0
b1
0
b0
0
Command
b7
1
b6
0
b5
1
b4
0
b3
0
b2
0
b1
1
b0
0
Command
b7
1
b6
0
b5
1
b4
0
b3
0
b2
0
b1
1
b0
1
Command
b7
R
/W
R
b6
0
R
b5
1
R
b4
0
R
b3
0
b2
1
b1
0
b0
0
Command
I/O data
Sel[3]
Sel[2]
Sel[1]
Sel[0]
b7
R
/W
CE[7]
b6
0
b5
1
b4
0
b3
0
b2
1
b1
0
b0
1
Command
I/O data
CE[6]
CE[5]
CE[4]
CE[3]
CE[2]
CE[1]
CE[0]
b7
1
b6
0
b5
1
b4
0
b3
0
b2
0
b1
0
b0
0
Command
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