參數(shù)資料
型號(hào)： IDT821068PX
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 編解碼器
英文描述： OCTAL PROGRAMMABLE PCM CODEC
中文描述： A/MU-LAW, PROGRAMMABLE CODEC, PQFP128
封裝： PLASTIC, QFP-128
文件頁(yè)數(shù)： 16/45頁(yè)
文件大?。?/td> 589K
代理商： IDT821068PX
INDUSTRIAL TEMPERATURE RANGE
IDT821068 OCTAL PROGRAMMABLE PCM CODEC
16
FSK SIGNAL GENERATION
The IDT821068 provides a FSK signal generator, which is used to
send Caller-ID message. Generally, the procedure of sending Caller-
ID FSK signal message is as the following:
Step 1: Start, send Seizure Signal;
Step 2: Send Mark Signal;
Step 3: Send one byte Caller-ID message, then send Flag Signal;
Step 4: If the messages to be sent are finished, stop;
otherwise, return to step 3.
Herein, the Seizure Signal is a string of '01' pairs to inform
telephone set that Caller-ID message will come; the Mark Signal is a
string of '1', which follows the Seizure Signal to inform telephone set
that Caller-ID message is coming; while the Flag Signal is a string of
'1' sending between two bytes of Caller-ID message, with this the
telephone set can have enough time to processing the received byte.
According to the generic procedure of FSK signal sending, a
recommended programming flow chart for IDT821068 FSK generator
is shown on the following page.
In order to make it easy for users to understand the flow chart,
several notes should be given:
1. The FSK function block will be enabled when FSK On/Off bit (FO)
in Global Command 24 is set to 1. After finishing sending the FSK
signal, the FO bit should be set to 0 to disable the generation function.
2. The FSK Start bit (FS) in Global Command 24 is used to
indicate the start of the FSK signal generation, when FS bit is 0 which
means the FSK generator is idle, users can go on with the operation;
when FS bit is 1 which means FSK generator is busy, users should
wait until it turns to 0 (after the message data in the FSK-RAM having
been sent, the FS bit will be cleared to 0 automatically).
3. The length of the Seizure Signal, Mark Signal and Flag Signal
are different in different system, for IDT821068, they can be
programmed by Global Command 22, 23 and 20 respectively. It
should be noted that, the Seizure Length is two times of the value that
set in Global Command 22, for example, if the SL[7:0] bits of Global
Command 22 is 1(d), it means that the Seizure Length is 2(d).
4. As is described in “Addressing of FSK-RAM”, the FSK-RAM
consists of 32 words, and each word consists of 16 bits (2 bytes), so it
can contain up to 64 bytes of message at one time. If the message
data that need to be sent is larger than 64 bytes, then users should
write them into the FSK-RAM several times according to the length of
the message.
5. The “Data length” is the number of bytes that written in the FSK-
RAM and need to be sent out. During the transmission of FSK signal,
an internal counter will count the number of data bytes that have been
transmitted, once it reaches the Data length, the FSK transmission is
completed and the FS bit is set to 0.
6. Because there is only one FSK-RAM shared by eight channels of
IDT821068, the FSK signal can only generate on one channel at one
time, the channel selection is done by the FCS[2:0] bits of Global
Command 24.
7. The FSK signal generated by the IDT821068 follows the BELL
202 and CCITT V.23 specifications. Users can select BT or Bellcore
standard by setting the FSK Mode Select bit (FMS) in Global
Command 24. The difference between BT and Bellcore is shown in
Table 3.
8. The “Mark After Send” bit (MAS) is useful if the total message
data is longer than 64 bytes. If the MAS bit is set to 1, then after
sending one frame of FSK-RAM message(=< 64 bytes), IDT821068
Item
BT
Bellcore
Mark( 1 )
frequency
1300 Hz ± 1.5%
1200Hz ± 1.1%
Space ( 0 )
frequency
2100 Hz ± 1.1%
2200 Hz ± 1.1%
Transmission
rate
1200 baud ± 1%
1200 baud ± 1 %
Word format
1 start bit which is ‘0’,
8 word bits (with least
significant bit LSB first),
1 stop bit which is ‘1’
1 start bit which is ‘0’
8 word bits (with
least significant bit
LSB first) 1 stop bit
which is ‘1’
will keep sending a series of ‘1’ to hold the communication channel for
sending next frame of FSK message, and at the same time, users
can update the FSK-RAM with new data. This series of '1' will stop by
set the MAS bit to 0 or set the FO bit to 0.
9. It should be noted that, when writing/reading message data to/
from the FSK-RAM via MPI/GCI interface, the sequence of read/write
is MSB first; but the FSK generator will send these signal (message
data) out through channel port with LSB first.
Refer to the IDT821068 Application Note for more information.
LEVEL METERING
The IDT821068 has a level meter which can be shared by all 8 sig-
nal channels. The level meter is designed to emulate the off-chip
PCM test equipment so as to facilitate the line-card, subscriber line
and user telephone set monitoring. The level meter tests the returned
signal and reports the measurement result via MPI/GCI interface.
When combined with Tone Generation and Loopback modes, this al-
lows the microprocessor to test channel integrity. CS[2:0] bits in Global
Command 19 select the channel, signal on which will be metered.
Level Metering function is enabled by setting LMO bit to 1 in Global
Command 19. There is a Level Meter Counter register for this
function. It can be accessed by Global Command 18. This register is
used to configure the number of time cycles for sampling PCM data (8
kHz sampling rate). The output of Level Metering will be sent to Level
Meter Result Low and Level Meter Result High registers (Global
Command 16 and 17). The LMRL register contains the lower 7 bits of
the output and a data-ready bit (DRLV), while the LMRH register
contains the higher 8 bits of the output. An internal accumulator sums
the rectified samples until the number configured by Level Meter
Counter register is reached. By then, the DRLV bit is set to 1 and
accumulation result is latched into the LMRL and LMRH registers
simultaneously.
Once the LMRH register is read, the DRLV bit will be reset. The DRLV
bit will be set high again by a new data available. The contents in LMRL
and LMRH will be overwritten by later metering result if they are not read
out yet. In Level Metering result read operation, it is highly recommended
to read LMRL first.
L/C bit in Global Command 19 determines the mode of Level
Meter operation. When L/C bit is 1, the Level Meter will measure the
linear PCM data, and if DRLV bit is 1, the measure result will be
Table 3
BT/Bellcore Standard of FSK Signal
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