參數(shù)資料
型號(hào)： IDT72V3640L39268BBGI
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： FIFO
英文描述： 1K X 36 OTHER FIFO, 5 ns, PBGA144
封裝： 13 X 13 MM, 1 MM PITCH, GREEN, PLASTIC, BGA-144
文件頁(yè)數(shù)： 12/46頁(yè)
文件大小： 453K
代理商： IDT72V3640L39268BBGI
2
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC IITM 36-BIT FIFO
1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36
NOVEMBER 2, 2005
PIN CONFIGURATIONS
TQFP (PK128-1, order code: PF)
TOP VIEW
DESCRIPTION:
The IDT72V3640/72V3650/72V3660/72V3670/72V3680/72V3690 are
exceptionally deep, high speed, CMOS First-In-First-Out (FIFO) memories
with clocked read and write controls and a flexible Bus-Matching x36/x18/x9
data flow. These FIFOs offer several key user benefits:
Flexible x36/x18/x9 Bus-Matching on both read and write ports
The period required by the retransmit operation is fixed and short.
The first word data latency period, from the time the first word is written to an
empty FIFO to the time it can be read, is fixed and short.
Asynchronous/Synchronous translation on the read or write ports
High density offerings up to 1 Mbit
Bus-Matching Sync FIFOs are particularly appropriate for network, video,
telecommunications,datacommunicationsandotherapplicationsthatneedto
buffer large amounts of data and match busses of unequal sizes.
Each FIFO has a data input port (Dn) and a data output port (Qn), both of
which can assume either a 36-bit, 18-bit or a 9-bit width as determined by the
state of external control pins Input Width (IW), Output Width (OW), and Bus-
Matching (BM) pin during the Master Reset cycle.
TheinputportcanbeselectedaseitheraSynchronous(clocked)interface,
or Asynchronous interface. During Synchronous operation the input port is
controlledbyaWriteClock(WCLK)inputandaWriteEnable(
WEN)input. Data
present on the Dn data inputs is written into the FIFO on every rising edge of
NOTE:
1. DNC = Do Not Connect.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IDT72V3640L6BB 功能描述:IC FIFO SS 1024X36 6NS 144-BGA RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
IDT72V3640L6BB8 功能描述:IC FIFO SS 1024X36 6NS 144-BGA RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
IDT72V3640L6BBG 制造商:Integrated Device Technology Inc 功能描述:FIFO Mem Sync Dual Depth/Width Uni-Dir 1K x 36 144-Pin BGA
IDT72V3640L6PF 功能描述:IC FIFO SS 1024X36 6NS 128-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
IDT72V3640L6PF8 功能描述:IC FIFO SS 1024X36 6NS 128-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標(biāo)準(zhǔn)包裝:90 系列:7200 功能:同步 存儲(chǔ)容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問(wèn)時(shí)間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
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