參數(shù)資料
型號: IDT723613L20PF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: CMOS Clocked FIFO With Bus Matching and Byte Swapping 64 x 36
中文描述: 64 X 36 OTHER FIFO, 12 ns, PQFP120
封裝: TQFP-120
文件頁數(shù): 21/26頁
文件大?。?/td> 193K
代理商: IDT723613L20PF
21
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT723613 CMOS CLOCKED FIFO WITH
BUS-MATCHING AND BYTE SWAPPING 64 x 36
CSB
EF
W/
R
B
SIZ1,
SIZ0
ENB
B0 -B35
CLKB
FF
CLKA
CSA
W
R
A
A0 - A35
MBA
ENA
3145 drw11
1
2
t
ENS
t
ENH
t
ENS
t
ENS
t
DS
t
ENH
t
ENH
t
DH
To FIFO
Previous Word in FIFO Output Register
Next Word From FIFO
LOW
LOW
LOW
HIGH
LOW
HIGH
FIFO Full
t
CLK
t
CLKH
t
CLKL
t
A
t
SKEW1(1)
t
CLKH
t
CLKL
t
CLK
t
WFF
t
WFF
Figure 11.
FF
Flag Timing and First Available Write when the FIFO is Full
NOTES:
1. t
SKEW1
is the mnimumtime between a rising CLKB edge and a rising CLKA edge for
EF
to transition HIGH in the next CLKA cycle. If the time between the rising CLKB edge
and rising CLKA edge is less than t
SKEW1
, then the transition of
EF
HIGH may occur one CLKA cycle later than shown.
2. Port B size of long word is selected for the FIFO read by SIZ1 = LOW, SIZ0 = LOW. If port B size is word or byte, t
SKEW1
is referenced fromthe rising CLKB edge that reads
the last word or byte of the long word, respectively.
AE
CLKA
ENA
CLKB
ENB
3145 drw12
2
1
t
ENS
t
ENH
t
ENS
t
ENH
X Long Words in FIFO
(X+1) Long Words in FIFO
t
SKEW2(1)
t
PAE
t
PAE
NOTES:
1. t
SKEW2
is the mnimumtime between a rising CLKA edge and a rising CLKB edge for
AE
to transition HIGH in the next CLKB cycle. If the time between the rising CLKA edge
and rising CLKB edge is less than t
SKEW2
, then AE may transition HIGH one CLKB cycle later than shown.
2. FIFO write (
CSA
= LOW, W/
R
A = HIGH, MBA = LOW), FIFO read (
CSB
= LOW, W/
R
B = LOW, MBB = LOW).
3. Port B size of long word is selected for the FIFO read by SIZ1 = LOW, SIZ0 = LOW. If port B size is word or byte, t
SKEW2
is referenced to the last word or byte of the long
word, respectively.
Figure 12. Timing for
AE
when the FIFO is Almost-Empty
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