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參數(shù)資料
| 型號(hào)： | IDT72131L35P |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | CMOS PARALLEL-TO-SERIAL FIFO 2048 X 9 4096 X 9 |
| 中文描述： | 2K X 9 OTHER FIFO, 35 ns, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁數(shù)： | 8/13頁 |
| 文件大?。?/td> | 126K |
| 代理商： | IDT72131L35P |
5.34
8
IDT72131, IDT72141
CMOS PARALLEL-TO-SERIAL FIFO 2048 x 9 & 4096 x 9
COMMERCIAL TEMPERATURE RANGES
Figure 7. Full Boundry Condition Timing
2751 drw 10
SOCP
t
SOCFF
0
1
n – 1
W
FF
SO
DATA
IN
t
WFF
t
WPF
DATA
IN
VALID
DATA
OUT
VALID
t
DS
t
DH
t
SOPD
Figure 8. Half Full, Almost Full and Almost Empty Timings
2751 drw 11
SOCP
W
HF
AEF
t
WF
HALF-FULL (1/2)
7/8 FULL
AEF
ALMOST-EMPTY
(1/8 FULL-1)
t
WF
1/8 FULL
ALMOST FULL (7/8 FULL + 1)
t
SOCF
t
SOCF
7/8 FULL
ALMOST-EMPTY
(1/8 FULL-1)
HALF-FULL
HALF-FULL +1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT72131L50P | CMOS PARALLEL-TO-SERIAL FIFO 2048 X 9 4096 X 9 |
| IDT72141 | CMOS PARALLEL-TO-SERIAL FIFO 2048 X 9 4096 X 9 |
| IDT72141L35P | CMOS PARALLEL-TO-SERIAL FIFO 2048 X 9 4096 X 9 |
| IDT72141L50P | 3/8 Pin 100mA Adjustable Positive Voltage Regulator 8-SOIC 0 to 125 |
| IDT72132 | CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 4096 x 9 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT72131L50CB | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT72131L50P | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT72156 | 制造商:IDT 功能描述:72156 |
| IDT7216L25FB | 制造商:Integrated Device Technology Inc 功能描述:MULTIPLIER, 64 Pin, Ceramic, Quad CERPAK |
| IDT7216L55GB | 制造商:Integrated Device Technology Inc 功能描述: |
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