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參數(shù)資料
| 型號： | IDT72131L35P |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | CMOS PARALLEL-TO-SERIAL FIFO 2048 X 9 4096 X 9 |
| 中文描述： | 2K X 9 OTHER FIFO, 35 ns, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁數(shù)： | 3/13頁 |
| 文件大?。?/td> | 126K |
| 代理商： | IDT72131L35P |
5.34
3
IDT72131, IDT72141
CMOS PARALLEL-TO-SERIAL FIFO 2048 x 9 & 4096 x 9
COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS
(Commercial: V
CC
= 5.0V
±
10%, T
A
= 0
°
C to +70
°
C
IDT72131/IDT72141
Commercial
Min.
Typ.
–1
Symbol
I
IL
(1)
Parameter
Max.
1
Unit
μ
A
Input Leakage Current
(Any Input)
Output Leakage Current
Output Logic "1" Voltage,
I
OUT
= -8mA
Output Logic "0" Voltage
I
OUT
= 16mA
Power Supply Current
Average Standby Current
(
W
=
RS
=
FL
/
RT
= V
IH
)
(SOCP = V
IL
)
Power Down Current
—
I
OL
(2)
V
OH
–10
2.4
—
—
10
—
μ
A
V
V
OL
—
—
0.4
V
I
CC1
(3)
I
CC2
(3)
—
—
90
8
140
12
mA
mA
I
CC3
(L)
(3,4)
—
—
2
mA
NOTES:
2751 tbl 06
1. Measurements with 0.4
≤
V
IN
≤
V
CC
.
2. SOCP
≤
V
IL
, 0.4
≤
V
OUT
≤
V
CC
.
3. I
CC
measurements are made with outputs open.
4.
RS
=
FL
/
RT
=
W
= V
CC
-0.2V; SOCP
≤
0.2V; all other inputs
≥
V
CC
-0.2V or
≤
0.2V.
CAPACITANCE
(T
A
= +25
°
C, f = 1.0MHz)
Parameter
(1)
C
IN
Input Capacitance
C
OUT
Output Capacitance
Symbol
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
10
12
Unit
pF
pF
NOTE:
1. This parameter is sampled and not 100% tested.
2751 tbl 05
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Rating
V
TERM
Terminal Voltage
with Respect
to GND
T
A
Operating
Temperature
T
BIAS
Temperature
Under Bias
T
STG
Storage
Temperature
I
OUT
DC Output
Current
Commercial
–0.5 to +7.0
Unit
V
0 to +70
°
C
–55 to +125
°
C
–55 to +125
°
C
50
mA
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2751 tbl 03
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
V
CC
Commercial Supply
Voltage
GND
Supply Voltage
V
IH
Input High Voltage
Commercial
V
IL(1)
Input Low Voltage
Min.
4.5
Typ.
5.0
Max.
5.5
Unit
V
0
0
—
0
—
V
V
2.0
—
—
0.8
V
NOTE:
1. 1.5V undershoots are allowed for 10ns once per cycle.
2751 tbl 04
相關PDF資料 |
PDF描述 |
|---|---|
| IDT72131L50P | CMOS PARALLEL-TO-SERIAL FIFO 2048 X 9 4096 X 9 |
| IDT72141 | CMOS PARALLEL-TO-SERIAL FIFO 2048 X 9 4096 X 9 |
| IDT72141L35P | CMOS PARALLEL-TO-SERIAL FIFO 2048 X 9 4096 X 9 |
| IDT72141L50P | 3/8 Pin 100mA Adjustable Positive Voltage Regulator 8-SOIC 0 to 125 |
| IDT72132 | CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 4096 x 9 |
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|---|---|
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| IDT7216L25FB | 制造商:Integrated Device Technology Inc 功能描述:MULTIPLIER, 64 Pin, Ceramic, Quad CERPAK |
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