- 您現(xiàn)在的位置：買賣IC網 > PDF目錄353778 > IDT70V7519S166DR (INTEGRATED DEVICE TECHNOLOGY INC) HIGH-SPEED 3.3V 256K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE PDF資料下載
參數(shù)資料
| 型號： | IDT70V7519S166DR |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 3.3V 256K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE |
| 中文描述： | 256K X 36 DUAL-PORT SRAM, 12 ns, PQFP208 |
| 封裝： | PLASTIC, QFP-208 |
| 文件頁數(shù)： | 4/22頁 |
| 文件大?。?/td> | 490K |
| 代理商： | IDT70V7519S166DR |
6.42
12
IDT70V7519S
High-Speed 256K x 36 Synchronous Bank-Switchable Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
An
An + 1
An + 2
An + 3
tCYC2
tCH2
tCL2
R/W
ADDRESS
CE0
CLK
CE1
BEn
(3)
DATAOUT
OE
tCD2
tCKLZ
Qn
Qn + 1
Qn + 2
tOHZ
tOLZ
tOE
5618 drw 06
(1)
tSC
tHC
tSB
tHB
tSW
tHW
tSA
tHA
tDC
tSC
tHC
tSB
tHB
(4)
(1 Latency)
(5)
Timing Waveform of Read Cycle for Pipelined Operation
(ADS Operation) (FT/PIPE'X' = VIH)(2)
NOTES:
1.
OE is asynchronously controlled; all other inputs are synchronous to the rising clock edge.
2.
ADS = VIL, CNTEN and REPEAT = VIH.
3. The output is disabled (High-Impedance state) by
CE0 = VIH, CE1 = VIL, BEn = VIH following the next rising edge of the clock. Refer to
Truth Table 1.
4. Addresses do not have to be accessed sequentially since
ADS = VIL constantly loads the address on the rising edge of the CLK; numbers
are for reference use only.
5. If
BEn was HIGH, then the appropriate Byte of DATAOUT for Qn + 2 would be disabled (High-Impedance state).
6. "x" denotes Left or Right port. The diagram is with respect to that port.
Timing Waveform of Read Cycle for Flow-through Output
(FT/PIPE"X" = VIL)(2,6)
An
An + 1
An + 2
An + 3
tCYC1
tCH1
tCL1
R/W
ADDRESS
DATAOUT
CE0
CLK
OE
tSC
tHC
tCD1
tCKLZ
Qn
Qn + 1
Qn + 2
tOHZ
tOLZ
tOE
tCKHZ
5618 drw 07
(5)
(1)
CE1
BEn
(3)
tSB
tHB
tSW
tHW
tSA
tHA
tDC
(4)
tSC
tHC
tSB
tHB
(5)
相關PDF資料 |
PDF描述 |
|---|---|
| IDT70V7519S166DRI | HIGH-SPEED 3.3V 256K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE |
| IDT70V7519S200DR | HIGH-SPEED 3.3V 256K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE |
| IDT70V7519S200DRI | HIGH-SPEED 3.3V 256K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE |
| IDT70V9199L7PF | HIGH-SPEED 3.3V 128K x9/x8 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM |
| IDT70V9199L7PFI | HIGH-SPEED 3.3V 128K x9/x8 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| IDT70V7519S166DRI | 功能描述:IC SRAM 9MBIT 166MHZ 208QFP RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:3,000 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:8K (1K x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:1.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SOIC 包裝:帶卷 (TR) |
| IDT70V7519S200BC | 功能描述:IC SRAM 9MBIT 200MHZ 256BGA RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:3,000 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:8K (1K x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:1.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SOIC 包裝:帶卷 (TR) |
| IDT70V7519S200BC8 | 功能描述:IC SRAM 9MBIT 200MHZ 256BGA RoHS:否 類別:集成電路 (IC) >> 存儲器 系列:- 標準包裝:3,000 系列:- 格式 - 存儲器:EEPROMs - 串行 存儲器類型:EEPROM 存儲容量:8K (1K x 8) 速度:400kHz 接口:I²C，2 線串口 電源電壓:1.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:8-SOIC 包裝:帶卷 (TR) |
| IDT70V7519S200BCG | 制造商:Integrated Device Technology Inc 功能描述:IC SRAM 9MBIT 200MHZ 256CABGA |
| IDT70V7519S200BCG8 | 制造商:Integrated Device Technology Inc 功能描述:IC SRAM 9MBIT 200MHZ 256CABGA |
發(fā)布緊急采購，3分鐘左右您將得到回復。