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參數(shù)資料
| 型號： | IDT5T9010BBI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 5T SERIES, PLL BASED CLOCK DRIVER, 5 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PBGA144 |
| 封裝： | PLASTIC, BGA-144 |
| 文件頁數(shù)： | 19/23頁 |
| 文件大?。?/td> | 168K |
| 代理商： | IDT5T9010BBI |
5
INDUSTRIALTEMPERATURERANGE
IDT5T9010
2.5V PROGRAMMABLE SKEW PLL CLOCK DRIVER TERACLOCK
Output skew with respect to the REF[1:0] and
REF[1:0]/VREF[1:0] input
is adjustable to compensate for PCB trace delays, backplane propaga-
tion delays or to accommodate requirements for special timing relation-
ships between clocked components. Skew is selectable as a multiple of a
time unit (tU) which ranges from 250ps to 1.25ns (see Programmable
Skew Range and Resolution Table). There are 18 skew/divide configu-
rations available for each output pair. These configurations are chosen
by the nF[2:0]/FBF[2:0] control pins. In order to minimize the number of
control pins, 3-level inputs (HIGH-MID-LOW) are used, they are in-
tended for but not restricted to hard-wiring. Undriven 3-level inputs
default to the MID level. The Control Summary Table shows how to
select specific skew taps by using the nF[2:0]/FBF[2:0] control pins.
PROGRAMMABLESKEW
EXTERNALDIFFERENTIALFEEDBACK
By providing a dedicated external differential feedback, the IDT5T9010
gives users flexibility with regard to skew adjustment. The FB and
FB/
VREF2 signals are compared with the input REF[1:0] and
REF[1:0]/VREF[1:0]
signals at the phase detector in order to drive the VCO. Phase differ-
ences cause the VCO of the PLL to adjust upwards or downwards
accordingly.
An internal loop filter moderates the response of the VCO to the
phase detector. The loop filter transfer function has been chosen to
provide minimal jitter (or frequency variation) while still providing accu-
rate responses to input frequency changes.
FS = LOW
FS = HIGH
Comments
Timing Unit Calculation (tU)
1/(16 x FNOM)
VCO Frequency Range (FNOM)(1,2)
50 to 125MHz
100 to 250MHz
Skew Adjustment Range(3)
Max Adjustment:
±8.75ns
±4.375ns
ns
±157.5°
Phase Degrees
±43.75%
% of Cycle Time
Example 1, FNOM = 50MHz
tU = 1.25ns
—
Example 2, FNOM = 75MHz
tU = 0.833ns
—
Example 3, FNOM = 100MHz
tU = 0.625ns
Example 4, FNOM = 150MHz
—
tU = 0.417ns
Example 5, FNOM = 200MHz
—
tU = 0.313ns
Example 6, FNOM = 250MHz
—
tU = 0.25ns
PROGRAMMABLE SKEW RANGE AND RESOLUTION TABLE
NOTES:
1. The device may be operated outside recommended frequency ranges without damage, but functional operation is not guaranteed.
2. The level to be set on FS is determined by the nominal operating frequency of the VCO and Time Unit Generator. The VCO frequency always appears at nQ[1:0] outputs when
they are operated in their undivided modes. The frequency appearing at the REF[1:0] and
REF[1:0]/VREF[1:0] and FB and FB/VREF2 inputs will be FNOM when the QFB and QFB
are undivided and DS[1:0] = MM. The frequency of the REF[1:0] and
REF[1:0]/VREF[1:0] and FB and FB/VREF2 inputs will be FNOM /2 or FNOM /4 when the part is configured for
frequency multiplication by using a divided QFB and
QFB and setting DS[1:0] = MM. Using the DS[1:0] inputs allows a different method for frequency multiplication (see Divide
Selection Table).
3. Skew adjustment range assumes that a zero skew output is used for feedback. If a skewed QFB and
QFB output is used for feedback, then adjustment range will be greater.
For example if a 4tU skewed output is used for feedback, all other outputs will be skewed –4tU in addition to whatever skew value is programmed for those outputs. ‘Max adjustment’
range applies to all output pairs where ±7tU skew adjustment is possible and at the lowest FNOM value.
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