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參數(shù)資料
| 型號： | IDT49C465PQF8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 算術邏輯單元 |
| 英文描述： | 49C SERIES, 32-BIT ERROR DETECT AND CORRECT CKT, PQFP144 |
| 封裝： | PLASTIC, QFP-144 |
| 文件頁數(shù)： | 20/39頁 |
| 文件大?。?/td> | 299K |
| 代理商： | IDT49C465PQF8 |
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27
IDT49C465/A
32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
COMMERCIAL TEMPERATURE RANGE
SET-UP AND HOLD TIMES — 49C465
Parameter Description
Refer to
Parameter
From
To
Timing Diagram
Number
Name
Input
(edge)
Output
(edge)
Min.
Unit
Figure
42
tSSLS
SDIN Set-up
*
before SLE =
LOW
4
ns
7, 9
43
tSSLH
SDIN Hold
*
after SLE =
LOW
4
ns
7, 9
44
tMMLS
MDIN Set-up
*
before MLE =
LOW
4
ns
8, 10, 11
45
tMMLH
MDIN Hold
*
after MLE =
LOW
4
ns
8, 10, 11
46
tCMLS
CBI Set-up
*
before MLE =
LOW
4
ns
8, 10, 11
47
tCMLH
CBI Hold
*
after MLE =
LOW
4
ns
8, 10, 11
48
tMPLS
MDIN Set-up
*
before PLE =
HIGH
12
ns
—
49
tMPLH
MDIN Hold
*
after PLE =
HIGH
0
ns
—
50
tCPLS
CBI Set-up
*
before PLE =
HIGH
12
ns
—
51
tCPLH
CBI Hold
*
after PLE =
HIGH
0
ns
—
52
tCPCLS
PCBI Set-up
*
before PLE =
HIGH
12
ns
—
53
tCPCLH
PCBI Hold
*
after PLE =
HIGH
0
ns
—
DIAGNOSTIC SET-UP AND HOLD TIMES
54
tCSCS
CBI Set-up
*
12
ns
15
55
tMSCS
MDIN Set-up
*
before SYNCLK =
HIGH
12
ns
15
56
tMLSCS
MLE Set-up =
HIGH
12
ns
15
57
tSESCS
SCLKEN Set-up =
LOW
4
ns
15
58
tSESCH
SCLKEN Hold =
LOW
after SYNCLK =
HIGH
4
ns
15
NOTE:
* = Where “edge” is not specified, both HIGH and LOW edges are implied.
MINIMUM PULSE WIDTH
Refer to
Parameter
Minimum Pulse Width
Timing Diagram
Number
name
Input
Conditions
Min.
Unit
Figure
59
tCLEAR
Min. CLEAR LOW time to clear diag. registers
Data = Valid
8
ns
14
60
tMLE
Min. MLE HIGH time to strobe new data
MD, CBI = Valid
5
ns
—
61
tPLE
Min. PLE HIGH time to strobe new data
SD = Valid
5
ns
—
62
tSLE
Min. SLE HIGH time to strobe new data
SD = Valid
5
ns
—
63
tSYNCLK
Min. SYNCLK HIGH time to clock in new data
SCKEN = LOW
5
ns
14
Input Rise Levels
GND to 3V
Input Rise/Fall Times
1V/ns
Input Timing Reference Levels
1.5V
Output Reference Levels
1.5V
Output Load
See Figure 18
相關PDF資料 |
PDF描述 |
|---|---|
| IDT49FCT818AEB | 8-BIT, DSP-PIPELINE REGISTER, CDFP24 |
| IDT49FCT818P | 8-BIT, DSP-PIPELINE REGISTER, PDIP24 |
| IDT49FCT818L | 8-BIT, DSP-PIPELINE REGISTER, CQCC28 |
| IDT49FCT818LB | 8-BIT, DSP-PIPELINE REGISTER, CQCC28 |
| IDT49FCT818PB | 8-BIT, DSP-PIPELINE REGISTER, PDIP24 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| IDT49C465PQFB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT |
| IDT49C466 | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT |
| IDT49C466A | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT |
| IDT49C466APQF | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT |
| IDT49C466GB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Error Detection & Correction (EDAC) |
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