參數(shù)資料
型號(hào)： ICS952601yFLFT
英文描述： Programmable Timing Control Hub⑩ for Next Gen P4⑩ processor
中文描述： 可編程定時(shí)控制中心⑩處理器的下一代?、?/td>
文件頁數(shù)： 21/24頁
文件大?。?/td> 181K
代理商： ICS952601YFLFT
21
Integrated
Circuit
Systems, Inc.
ICS952601
0701G—10/13/04
The following diagrams illustrate SRC clock timing during PCI_Stop# and PwrDwn# modes with SRC_Pwrdwn and
SRC_Stop tristate control bits set to driven or tristate in byte 2 of the control register.
SRC_Stop = Driven, SRC_Pwrdwn = Driven
PCI_Stop#
1.8mS
PWRDWN#
PCI (Free Running)
CPU (Free Running)
CPU# (Free Running)
SRC (Stoppable)
SRC# (Stoppable)
1 PCI
clock max
Notes:
1. When both bits (SRC_Stop & SRC_Pwrdown tristate bits) are set to driven, the clock chip will never tristate the SRC output
clock (assuming clock's OE bit is set to "1")
SRC Clock Tristate Timing
SRC_Stop = Tristate, Pwrdwn = Tristate
PCI_Stop#
1.8mS
PWRDWN#
PCI (Free Running)
CPU (Free Running)
CPU# (Free Running)
SRC (Stoppable)
SRC# (Stoppable)
1 PCI
clock max
Notes:
1. When SRC_Stop and SRC_Pwrdwn bits are set to tristate, the clock chip will tristate outputs during the assertion of
PCI_Stop# and PWRDWN#.
2. Tristate outputs are pulled low by output termination resistors as shown here.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ICS952601YGLFT 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub⑩ for Next Gen P4⑩ processor
ICS952606 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for Next Gen P4 processor
ICS952606FLFT 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for Next Gen P4 processor
ICS952607 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for Next Gen P4 processor
ICS952607YFLF-T 制造商:ICS 制造商全稱:ICS 功能描述:Programmable Timing Control Hub for Next Gen P4 processor
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