參數(shù)資料
型號: ICS1562BM-201T
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 20/20頁
文件大?。?/td> 0K
描述: IC VIDEO CLK SYNTHESIZER 16-SOIC
產(chǎn)品變化通告: Product Discontinuation 13/May/2009
標準包裝: 2,500
類型: 時鐘/頻率合成器,時鐘發(fā)生器,扇出配送
PLL:
輸入: CMOS,TTL,晶體
輸出: CMOS,PECL
電路數(shù): 1
比率 - 輸入:輸出: 1:3
差分 - 輸入:輸出: 無/是
頻率 - 最大: 260MHz
除法器/乘法器: 是/是
電源電壓: 4.75 V ~ 5.25 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 16-SOIC
包裝: 帶卷 (TR)
其它名稱: 1562BM-201T
REG#
BIT(S)
BIT REF.
DESCRIPTION
6
0-3
N2[0]..N2[3]
Sets the modulus of the N2 divider.
7
0-3
N2[4]..N2[7]
The input of the N2 divider is the output of the N1 divider in all clock
modes except AUXEN.
8
3
N2[8]
8
0-2
V[0]..V[1]
Sets the gain of the VCO.
9
0-1
P[0]..P[1]
Sets the gain of the phase detector according to this table.
9
3
[P2]
Phase detector tuning bit. Normally should be set to one.
V[2]
V[1]
V[0]
VCO GAIN
(MHz/VOLT)
10
0
30
10
1
45
11
0
60
11
1
80
P[1]
P[0]
GAIN (uA/radian)
00
0.05
01
0.15
10
0.5
11
1.5
10
1
LOADEN~
Load clock divider enable (active low). When set to logic 1, the
LOAD and LD/N2 outputs will cease toggling.
10
2
SKEW-
Differential output duty factor adjust.
10
3
SKEW+
SKEW-
0
Default
0
1
Reduces THIGH by approximately
100 ps
1
0
Increases THIGH by approximately
100 ps
1
Do not use
ICS1562B
9
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