參數(shù)資料
型號: IBM25NPE405H-3BA266CZ
元件分類: 微控制器/微處理器
英文描述: 32-BIT, 266 MHz, RISC PROCESSOR, PBGA580
封裝: 35 MM, PLASTIC, EBGA-580
文件頁數(shù): 73/74頁
文件大?。?/td> 1423K
代理商: IBM25NPE405H-3BA266CZ
Preliminary
PowerNP NPe405H Embedded Processor Data Sheet
8
PLB to PCI Bridge
The PLB to PCI bridge provides a mechanism for connecting PCI devices to the processor, peripherals, and
memory. This interface is PCI Specification rev 2.2 compliant.
Features include:
Internal PCI bus arbiter for up to six external devices at PCI bus speeds up to 66MHz. Internal arbiter use
is optional and can be disabled for systems which employ an external arbiter.
PCI bus frequency up to 66MHz
- Asynchronous operation from 1/8 PLB frequency to 66MHz maximum
32-bit PCI Address/Data Bus
Power Management:
- PCI Bus Power Management v1.1 compliant
Buffering between PLB and PCI:
- PCI Target 64-byte write post buffer
- PCI Target 96-byte read prefetch buffer
- PLB Slave 32-byte write post buffer
- PLB Slave 64-byte read prefetch buffer
Error tracking/status
Supports PCI Target side configuration
Supports processor access to all PCI address spaces:
- Single-byte PCI I/O reads and writes
- PCI memory single-beat and prefetch-burst reads and single-beat writes
- Single-byte PCI configuration reads and writes (type 0 and type 1)
- PCI interrupt acknowledge
- PCI special cycle
Supports PCI target access to all PLB address spaces
Supports PowerPC processor boot from PCI memory
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