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參數資料
| 型號： | IBM13Q16734HCB |
| 廠商： | IBM Microeletronics |
| 英文描述： | 16M x 72 Registered SDRAM Module(16M x 72 200腳寄存同步動態(tài)RAM模塊) |
| 中文描述： | 16米x 72注冊內存模塊（16米x 72 200腳寄存同步動態(tài)內存模塊） |
| 文件頁數： | 10/14頁 |
| 文件大?。?/td> | 275K |
| 代理商： | IBM13Q16734HCB |
IBM13Q16734HCB
16M x 72 Registered SDRAM Module
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 10 of 14
04K8915.C75644E
6/00
Functional Description and Timing Diagram
Refer to IBM 200-pin SDRAM Registered DIMM Functional Description and Timing Diagram
(Document 04K8917.C75644C, for SDRAM operation).
Clock Frequency and Latency
Symbol
Parameter
Value
Units
Notes
f
CK
Clock Frequency
66.667
MHz
t
CK
Clock Cycle Time
15
ns
t
AA
CAS Latency
3
t
CK
1
t
RCD
RAS to CAS Delay
2
t
CK
t
RC
Bank Cycle Time
6
t
CK
t
RAS
Minimum Bank Active Time
4
t
CK
t
RP
Precharge Time
2
t
CK
t
DPL
Data In to Precharge
1
t
CK
t
DAL
Data In to Active/Refresh
3
t
CK
t
RRD
Bank to Bank Delay Time
2
t
CK
t
CCD
CAS to CAS Delay Time
1
t
CK
t
WL
Write Latency
1
t
CK
t
DQW
DQM Write Mask Latency
1
t
CK
t
DQZ
DQM Data Disable Latency
3
t
CK
t
CSL
Clock Suspend Latency
1
t
CK
1. SDRAMs have t
AA
=2, but on-board DIMM register adds one clock cycle
Presence Detect Read Cycle
Symbol
Parameter
Value
Unit
Notes
Min
Max
t
PD
PDE to Valid Presence Detect Data
—
10
ns
1
t
PDOFF
PDE Inactive to Presence Detects Inactive
0
10
ns
2
1. Measured with the specified current load and 100pF.
2. t
PDOFF
(max) defines the time at which the output achieves the open circuit condition and is not referenced to output voltage levels.
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