參數(shù)資料
型號(hào): IBM0165805B
廠商: IBM Microeletronics
英文描述: 8M x 8 12/11 EDO DRAM(8M x 8 動(dòng)態(tài)RAM(超頁(yè)面模式并帶23條地址線,其中12條為行地址選通,11條為列地址選通))
中文描述: 8米× 8 12/11 EDO公司的DRAM(8米× 8動(dòng)態(tài)隨機(jī)存儲(chǔ)器(超頁(yè)面模式并帶23條地址線,其中12條為行地址選通,11條為列地址選通))
文件頁(yè)數(shù): 28/29頁(yè)
文件大?。?/td> 946K
代理商: IBM0165805B
IBM0165805B
IBM0165805P
8M x 8 12/11 EDO DRAM
IBM Corporation. All rights reserved.
Use is further subject to the provisions at the end of this document.
Page 28 of 29
88H2009
GA14-4254-02
Revised 11/97
Revision Log
Revision
Contents of Modification
1/2/97
Initial specification release.
03/19/97
1. WE for the Hidden Refresh Write cycle in the Truth Table was changed from “H” to “L
H”.
2. t
OED
was moved from the Common Parameters table to the Write Cycle Parameters Table.
3. The note “Implementing WE at RAS time during a Read or Write cycle is optional. Doing so will facilitate
compatibility with future EDO DRAMs.” was removed from all of the Read and Write timing diagrams.
4. t
ODD
was changed to t
OED
in notes in the Write Cycle and Read Cycle Parameters tables.
5. “Hyper Page Mode” was changed to “EDO (Hyper Page) Mode” in the timing diagram titles.
6. Removed the Test Mode parameters and timing diagrams.
7. LVTTL/LVCMOS changed to TTL/CMOS.
8. LVCMOS currents were removed.
9. Power numbers on the spec cover were recalculated.
11/97
1. Changed RetentionTime from 256ms to 128ms on Low Power DRAMs.
Discontinued (12/98 - last order; 3/99 last ship)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IBM0165805BJ3C50 制造商:IBM 功能描述:75H2806
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