參數(shù)資料
型號: IA8X44
廠商: Innovasic Semiconductor
英文描述: SDLC COMMUNICATIONS CONTROLLER
中文描述: SDLC的通信控制器
文件頁數(shù): 22/49頁
文件大?。?/td> 220K
代理商: IA8X44
IA8044/IA8344
Data Sheet
SDLC COMMUNICATIONS CONTROLLER
General CPU Registers
Accumulator (ACC):
ACC is the Accumulator register. Most instructions use the accumulator to hold the
operand. The mnemonics for accumulator-specific instructions refer to accumulator as A, not
ACC.
ACC
Bit: 7
6
5
4
ACC.7
ACC.6
ACC.5
ACC.4
B register (B):
The B register is used during multiply and divide instructions. It can also be used as a
scratch-pad register to hold temporary data.
B
Bit: 7
6
5
4
B.7
B.6
B.5
B.4
Program Status Word (PSW):
Contains CPU status flags, register select bits and user flags.
PSW
Bit: 7
6
5
4
CY
AC
F0
RS1
PSW.0
P
Parity flag, affected by hardware to indicate odd / even number
of “one” bits in the Accumulator, i.e. even parity.
PSW.1
-
User defined flag.
PSW.2
OV
Overflow flag.
PSW.3
RS0
Register bank select control bit 0, used to select working
register bank.
PSW.4
RS1
Register bank select control bit 1, used to select working register
bank.
PSW.5
F0
General purpose Flag 0 available for user.
PSW.6
AC
Auxiliary Carry flag for carry out of or into bit 3.
PSW.7
CY
Carry flag for carry out of or into bit 7.
Copyright
2003
innov
ASIC
The End of Obsolescence
ENG210010112-00
www.innovasic.com
Customer Support:
Page 22 of 49
1-888-824-4184
3
2
1
0
ACC.3
ACC.2
ACC.1
ACC.0
3
2
1
0
B.3
B.2
B.1
B.0
3
2
1
0
RS0
OV
-
P
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