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| 型號： | HYMD18M645AL6-K |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | 8M X 64 DDR DRAM MODULE, 0.75 ns, DMA200 |
| 封裝： | 67.60 X 31.75 X 1 MM, SODIMM-200 |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 232K |
| 代理商： | HYMD18M645AL6-K |
HYMD18M645A(L)6-K/H/L
Rev. 0.5/May. 02
12
SIMPLIFIED COMMAND TRUTH TABLE
Note :
1. LDM/UDM states are Don’t Care. Refer to below Write Mask Truth Table.
2. OP Code(Operand Code) consists of A0~A11 and BA0~BA1 used for Mode Registering duing Extended MRS or MRS.
Before entering Mode Register Set mode, all banks must be in a precharge state and MRS command can be issued after tRP
period from Prechagre command.
3. If a Read with Autoprecharge command is detected by memory component in CLK(n), then there will be no command presented
to activated bank until CLK(n+BL/2+tRP).
4. If a Write with Autoprecharge command is detected by memory compoment in CLK(n), then there will be no command presented
to activated bank until CLK(n+BL/2+1+tDPL+tRP). Last Data-In to Prechage delay(tDPL) which is also called Write Recovery Time
(tWR) is needed to guarantee that the last data has been completely written.
5. If A10/AP is High when Row Precharge command being issued, BA0/BA1 are ignored and all banks are selected to be
precharged.
Command
CKEn-1
CKEn
/CS
/RAS
/CAS
/WE
ADDR
A10/
AP
BA
Note
Extended Mode Register Set
H
X
LLLL
OP code
1,2
Mode Register Set
H
X
LLLL
OP code
1,2
Device Deselect
HX
H
XXX
X1
No Operation
L
H
Bank Active
H
X
L
H
RA
V
1
Read
H
X
LHLH
CA
L
V
1
Read with Autoprecharge
H1,3
Write
HX
L
H
L
CA
L
V
1
Write with Autoprecharge
H1,4
Precharge All Banks
HX
L
H
L
X
HX
1,5
Precharge selected Bank
LV
1
Read Burst Stop
H
X
L
H
L
X
1
Auto Refresh
H
L
H
X
1
Self Refresh
Entry
H
L
LLL
H
X
1
Exit
L
H
XXX
1
L
HHH
Precharge
Power Down
Mode
Entry
H
L
H
XXX
X
1
L
HHH
1
Exit
L
H
XXX
1
L
HHH
1
Active Power
Down Mode
(Clock Suspend)
Entry
H
L
H
XXX
X
1
L
VVV
1
Exit
L
H
X
1
( H=Logic High Level, L=Logic Low Level, X=Don’t Care, V=Valid Data Input, OP Code=Operand Code, NOP=No Operation )
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HYMD18M645AL6-L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM|DDR|8MX64|CMOS|DIMM|200PIN|PLASTIC |
| HYMD18M725A6 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8Mx72|2.5V|K/H/L|x5|DDR SDRAM - SO DIMM 64MB |
| HYMD18M725A6-H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM|DDR|8MX72|CMOS|DIMM|200PIN|PLASTIC |
| HYMD18M725A6-K | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM|DDR|8MX72|CMOS|DIMM|200PIN|PLASTIC |
| HYMD18M725A6-L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SDRAM|DDR|8MX72|CMOS|DIMM|200PIN|PLASTIC |
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