參數(shù)資料
型號: HYE25L256160AF-7.5
廠商: INFINEON TECHNOLOGIES AG
英文描述: BJAWBMSpecialty DRAMs Mobile-RAM
中文描述: BJAWBMSpecialty DRAM的移動RAM
文件頁數(shù): 8/55頁
文件大小: 1053K
代理商: HYE25L256160AF-7.5
HYE25L256160AC
256-Mbit Mobile-RAM
Pin Configuration
Data Sheet
8
V1.1, 2003-04-16
A2
B1
B2
C1
C2
D1
D2
E1
E9
D8
D9
C8
C9
B8
B9
A8
F1
E8
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
UDQM
LDQM
Input/
Output
Active
High
Data Input/Output
Data bus operates in the same manner as on conventional DRAMs.
Input
Active
High
Data Input/Output Mask
UDQM and LDQM are output disable signals during read mode and input mask
signals for write data. In Read mode, U/LDQM have a latency of two clock
cycles and control the output buffers like low active output enable signals. In
Write mode, U/LDQM have a latency of zero and operate as a word mask by
allowing input data to be written if it is low but blocks the write operation if the
respective DQM is high.
UDQM controls the upper byte and LDQM controls the lower byte.
Not Connected
No internal electrical connection is present.
DQ Power Supply
E2
NC
A7,
B3,
C7,
D3
A3
B7
C3
D7
A9
E4
J9
A1
E3
J1
V
DDQ
Supply –
V
SSQ
Supply –
DQ Ground
V
DD
Supply –
Power Supply
V
SS
Supply –
Ground
Table 3
Pin Symbol Type
Input/Output Signals
(cont’d)
Polarity Function
相關(guān)PDF資料
PDF描述
HYE25L256160AC 256-Mbit Mobile-RAM
HYE25L256160AC-8 256-Mbit Mobile-RAM
HYE25L256160AF 256MBit Mobile-RAM
HYE25L256160AF-75 CAP TANT 10UF 6.3V 20% SMD
HYE25L256160AC-7.5 BJAWBMSpecialty DRAMs Mobile-RAM
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