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參數(shù)資料
| 型號： | HYE25L256160AC-8 |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 英文描述： | 256-Mbit Mobile-RAM |
| 中文描述： | 256兆移動RAM |
| 文件頁數(shù)： | 11/55頁 |
| 文件大?。?/td> | 1053K |
| 代理商： | HYE25L256160AC-8 |
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Data Sheet
11
V1.1, 2003-04-16
HYE25L256160AC
256-Mbit Mobile-RAM
Functional Description
3.2.1
Read and write accesses to the 256-Mbit Mobile-RAM are burst oriented, with the burst length being
programmable. The burst length determines the maximum number of column locations that can be accessed for
a given Read or Write command. Burst lengths of 2, 4, or 8 locations are available for both the sequential and the
interleaved burst types.
Reserved states should not be used, as unknown operation or incompatibility with future versions may result.
When a Read or Write command is issued, a block of columns equal to the burst length is effectively selected. All
accesses for that burst take place within this block, meaning that the burst wraps within the block if a boundary is
reached. The block is uniquely selected by Ai-A1 when the burst length is set to two, by Ai-A2 when the burst
length is set to four and by Ai-A3 when the burst length is set to eight (where Ai is the most significant column
address bit for a given configuration). The remaining (least significant) address bit(s) is (are) used to select the
starting location within the block. The programmed burst length applies always to Read bursts and depending on
A9 in Operating Mode also on Write bursts.
Burst Length
MR
Mode Register Definition
(BA[1:0] = 00
B
)
BA1
BA0
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
0
0
MODE
CL
BT
BL
reg. addr
w
w
w
w
Field
BL
Bits
[2:0]
Type
w
Description
Burst Length
Number of sequential bits per DQ related to one read/write command; see
Chapter 3.2.1
.
Note:All other bit combinations are RESERVED.
000 1
001 2
010 4
011 8
111 full page (sequential burst type only)
Burst Type
See
Table 4
for internal address sequence of low order address bits; see
Chapter 3.2.2
.
0
Sequential
1
Interleaved
CAS Latency
Number of full clocks from read command to first data valid window; see
Chapter 3.2.3
.
Note:All other bit combinations are RESERVED.
BT
3
w
CL
[6:4]
w
010 2
011 3
Operating Mode
See
Chapter 3.2.4
.
Note:All other bit combinations are RESERVED.
MODE
[12:7] w
000000
000100
Burst Read/Burst Write
Burst Read/Single Write
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PDF描述 |
|---|---|
| HYE25L256160AF | 256MBit Mobile-RAM |
| HYE25L256160AF-75 | CAP TANT 10UF 6.3V 20% SMD |
| HYE25L256160AC-7.5 | BJAWBMSpecialty DRAMs Mobile-RAM |
| HYM321000GS-60 | 1M x 32-Bit Dynamic RAM Module 2M x 16-Bit Dynamic RAM Module |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HYE25L256160AF | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:256MBit Mobile-RAM |
| HYE25L256160AF-7.5 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:BJAWBMSpecialty DRAMs Mobile-RAM |
| HYE25L256160AF-75 | 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:256MBit Mobile-RAM |
| HYESD0514P | 制造商:HY 制造商全稱:HY ELECTRONIC CORP. 功能描述:4 Channel Low Capacitance ESD Protection Diode Array |
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