參數(shù)資料
型號(hào): HYB25D256160TT-3
廠商: INFINEON TECHNOLOGIES AG
英文描述: 240 x 128 pixel format, Blue LED backlight
中文描述: 記憶譜
文件頁(yè)數(shù): 87/94頁(yè)
文件大小: 3326K
代理商: HYB25D256160TT-3
Data Sheet
88
Rev. 1.6, 2004-12
HYB25D256[16/40/80]0C[E/C/F/T](L)
256 Mbit Double-Data-Rate SDRAM
Timing Diagrams
5.12
Write: Bank Write Access Command
Figure 50 shows the timing diagram for Bank Write Access.
Figure 50
Bank Write Access (Burst Length = 4)
t WPST
t DQ
S
L
t IH
t IS
t IH
t IS
t IH
t IS
t IH
t IS
t IH
t IS
t CL
t CH
t CK
t RA
S
Wr
ite
N
OP
NOP
N
O
P
NOP
P
RE
N
O
P
NOP
BA
x
NO
P
A
C
T
RA
DI
n=
data
in
for
co
lumn
n.
3s
ubs
equ
ent
ele
m
ents
of
da
ta
in
are
ap
pli
ed
in
the
pr
ogr
ammed
ord
er
fo
llo
w
ing
D
In.
DIS
AP
=
Dis
able
Au
to
Prec
har
ge.
*=
don
'tc
are
if
A10
is
H
igh
at
this
poin
t.
PR
E
=
Pr
ec
harg
e;
ACT
=
Ac
tiv
e;
R
A
=
Row
addre
ss
.
NOP
c
omman
ds
ar
es
how
n
for
e
ase
of
ill
us
tration;
ot
he
rva
lid
co
mmand
smay
be
po
ss
ible
at
thes
e
times
.
DI
n
VA
LI
D
BA
x
CKE
Com
m
and
A1
0
BA0,
BA1
DQ
S
DQ
DM
CK
t WPR
E
S
t WR
t RC
D
ALL
BANKS
ONE
BANK
DIS
AP
Don’t
Care
A0
-A9,
A11,
A12
Col
n
BA
x
t DQ
S
t DQ
S
H
t DS
H
t WPR
E
t DQ
SS
=
min.
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