參數(shù)資料
型號(hào)： HYB25D128323C-4.5
廠商： INFINEON TECHNOLOGIES AG
英文描述： 128 Mbit DDR SGRAM
中文描述： 128兆的DDR SGRAM
文件頁(yè)數(shù)： 47/53頁(yè)
文件大小： 1166K
代理商： HYB25D128323C-4.5
t
DAL
Data Sheet
47
V1.7, 2003-07
HYB25D128323C[-3/-3.3/-3.6/-4.5/-5.0/L3.6/L4.5]
128 Mbit DDR SGRAM [4M x 32]
Electrical Characteristics
Clock low level width
Minimum clock half period
t
CL
t
HP
0.45
t
CH
,
t
CL
0.55
—
0.45
t
CH
,
t
CL
0.55
—
t
CK
t
CK
—
—
Command and Address Setup and Hold Times
Address and Command input setup time
Address and Command input hold time
t
IS
t
IH
0.75
0.75
—
—
1.0
1.0
—
—
ns
ns
—
—
Common Parameters
Row Cycle Time
Row Cycle Time in Auto Refresh
Row Active Time
ACTIVE to READ with Auto precharge command
Row Precharge Time
Activate(a) to Activate(b) Command period
CAS(a) to CAS(b) Command period
Last data in to Active (
t
WR
+
t
RP
)
t
RC
t
RFC
t
RAS
t
RAP
t
RP
t
RRD
t
CCD
46.8
54
32.4
t
RAS (min.)
- (burst length *
t
CK
/2)
14.4
—
9.0
—
1
—
6
—
—
—
15.7k 36
54
63
—
—
15.7k ns
ns
ns
—
—
—
—
—
—
—
—
ns
ns
ns
t
CK
t
CK
18
9.0
1
6
—
—
—
—
Read Cycle Timing Parameters for Data and Data Strobe
Data Access Time from Clock
DQS edge to Clock edge skew
DQS Read Preamble
DQS Read Postamble
Row to Column Delay Time for Reads
DQS edge to output data edge skew
Data hold skew factor
Data Output Hold time from DQS
t
AC
t
DQSCK
t
RPRE
t
RPST
t
RCDDC
t
DQSQ
t
QHS
t
QH
-0.55
-0.55
0.7
0.8
4
—
—
t
HP
–
t
QHS
+0.55 -0.7
+0.55 -0.7
0.9
1.1
—
+0.33 —
0.36
+0.7
+0.7
0.9
1.1
—
+0.45 ns
0.45
ns
ns
t
CK
t
CK
t
CK
—
—
—
—
—
—
—
—
0.7
0.8
4
—
t
HP
–
t
QHS
ns
ns
Write Cycle Timing Parameters for Data and Data Strobe
Row to Column Delay Time for Writes
Clock to rising Edge DQS (Write Latency)
Data-in to DQS Setup Time
Data-in to DQS Hold Time
Data Mask to DQS Setup Time
Data Mask to DQS Hold Time
Clock to DQS Write Preamb. Setup Time
Clock to DQS Write Preamble Hold Time
DQS Write Postamble Hold Time
Write Recovery Time
t
RCDWR
t
DQSS
t
QDQSS
t
QDQSH
t
DMDQSS
t
DMDQSH
t
WPRES
t
WPREH
t
WPST
t
WR
2
0.75
0.40
0.40
0.40
0.40
0
0.25
0.4
2
—
1.1
—
—
—
—
—
—
0.6
—
2
0.75
0.6
0.6
0.6
0.6
0
0.25
0.4
2
—
1.25
—
—
—
—
—
—
0.6
—
t
CK
t
CK
ns
ns
ns
ns
t
CK
t
CK
t
CK
t
CK
—
—
—
—
—
—
—
—
—
3)
Table 18
Part Number Extension
Interface
Parameter
Timing Parameters for speed sorts L3.6 and L4.5
(cont’d)
L3.6
MIM
L4.5
WM/MIM
min.
Unit Note
1)
—
—
—
2)
Symbol min.
max.
max.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HYB25D128323C-5 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:128 Mbit DDR SGRAM
HYB25D128323CL3.6 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:128 Mbit DDR SGRAM
HYB25D128323C-L3.6 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:128 Mbit DDR SGRAM
HYB25D128323CL-3.6 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:128 Mbit DDR SGRAM
HYB25D128323CL4.5 制造商:INFINEON 制造商全稱:Infineon Technologies AG 功能描述:128 Mbit DDR SGRAM
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