參數(shù)資料
型號: HY5DU12422BLT-H
廠商: HYNIX SEMICONDUCTOR INC
元件分類: DRAM
英文描述: 128M X 4 DDR DRAM, 0.75 ns, PDSO66
封裝: 0.400 X 0.875 INCH, 0.65 MM PITCH, TSOP2-66
文件頁數(shù): 16/31頁
文件大小: 686K
代理商: HY5DU12422BLT-H
Rev. 1.1 / Apr. 2006
23
1HY5DU12422B(L)T
HY5DU12822B(L)T
HY5DU121622B(L)T
AC OPERATING CONDITIONS (TA=0 to 70 oC, Voltage referenced to VSS = 0V)
Note:
1. VID is the magnitude of the difference between the input level on CK and the input on /CK.
2. The value of VIX is expected to equal 0.5*V DDQ of the transmitting device and must track variations in the DC level of the same.
*For more information about AC Overshoot/Undershoot Specifications, refer to “Device Operation” section in hynix website.
AC OPERATING TEST CONDITIONS (TA=0 to 70oC, Voltage referenced to VSS = 0V)
Parameter
Symbol
Min
Max
Unit
Input High (Logic 1) Voltage, DQ, DQS and DM signals
VIH(AC)
VREF + 0.31
-
V
Input Low (Logic 0) Voltage, DQ, DQS and DM signals
VIL(AC)
-VREF - 0.31
V
Input Differential Voltage, CK and /CK inputs1
VID(AC)
0.7
VDDQ + 0.6
V
Input Crossing Point Voltage, CK and /CK inputs2
VIX(AC)
0.5*VDDQ-0.2
0.5*VDDQ+0.2
V
Parameter
Value
Unit
Reference Voltage
VDDQ x 0.5
V
Termination Voltage
VDDQ x 0.5
V
AC Input High Level Voltage (VIH, min)
VREF + 0.31
V
AC Input Low Level Voltage (VIL, max)
VREF - 0.31
V
Input Timing Measurement Reference Level Voltage
VREF
V
Output Timing Measurement Reference Level Voltage
VTT
V
Input Signal maximum peak swing
1.5
V
Input minimum Signal Slew Rate
1
V/ns
Termination Resistor (RT)50
Ω
Series Resistor (RS)25
W
Output Load Capacitance for Access Time Measurement (CL)30
pF
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