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| 型號： | HY5DU12422BLT-H |
| 廠商： | HYNIX SEMICONDUCTOR INC |
| 元件分類： | DRAM |
| 英文描述： | 128M X 4 DDR DRAM, 0.75 ns, PDSO66 |
| 封裝： | 0.400 X 0.875 INCH, 0.65 MM PITCH, TSOP2-66 |
| 文件頁數(shù)： | 31/31頁 |
| 文件大?。?/td> | 686K |
| 代理商： | HY5DU12422BLT-H |
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Rev. 1.1 / Apr. 2006
9
1HY5DU12422B(L)T
HY5DU12822B(L)T
HY5DU121622B(L)T
SIMPLIFIED COMMAND TRUTH TABLE
Command
CKEn-1
CKEn
CS
RAS
CAS
WE
ADDR
A10/AP
BA
Extended Mode Register Set1,2
H
X
L
LLL
OP code
Mode Register Set1,2
H
X
L
LLL
OP code
Device Deselect1
HX
X
No Operation1
LH
H
Bank Active1
HX
L
H
RA
V
Read1
H
X
LHLH
CA
L
V
Read with Autoprecharge1,3
H
Write1
HX
L
H
L
CA
L
V
Write with Autoprecharge1,4
H
Precharge All Banks1,5
HX
L
H
L
X
HX
Precharge selected Bank1
LV
Read Burst Stop1
HX
L
H
L
X
Auto Refresh1
HH
LL
L
H
X
Self Refresh1
Entry
HL
L
H
X
Exit
LH
HX
X
LH
H
Precharge Power
Down Mode1
Entry
HL
HX
X
LH
H
Exit
LH
HX
X
LH
H
Active Power
Down Mode1
Entry
HL
HX
X
LV
V
Exit
L
H
X
Note:
1. LDM/UDM states are Don’t Care. Refer to below Write Mask Truth Table.
2. OP Code(Operand Code) consists of A0~A12 and BA0~BA1 used for Mode Register setting during Extended MRS or MRS.
Before entering Mode Register Set mode, all banks must be in a precharge state and MRS command can be issued after tRP
period from Precharge command.
3. If a Read with Autoprecharge command is detected by memory component in CK(n), then there will be no command presented
to activated bank until CK(n+BL/2+tRP).
4. If a Write with Autoprecharge command is detected by memory component in CK(n), then there will be no command presented
to activated bank until CK(n+BL/2+1+tWR+tRP). Write Recovery Time(tWR) is needed to guarantee that the last data has been
completely written.
5. If A10/AP is High when Precharge command being issued, BA0/BA1 are ignored and all banks are selected to be
precharged.
*For more information about Truth Table, refer to “Device Operation” section in Hynix website.
( H=Logic High Level, L=Logic Low Level, X=Don’t Care, V=Valid Data Input, OP Code=Operand Code, NOP=No Operation )
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相關(guān)代理商/技術(shù)參數(shù) |
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| HY5DU12422BLTP | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:512Mb DDR SDRAM |
| HY5DU12422BLTP-X | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:512Mb DDR SDRAM |
| HY5DU12422BT | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:512Mb DDR SDRAM |
| HY5DU12422BT_06 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:512Mb DDR SDRAM |
| HY5DU12422BT-H-A | 制造商:Hynix Semi 功能描述: |
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