參數(shù)資料
型號: HV7131R
廠商: Electronic Theatre Controls, Inc.
元件分類: 圖像傳感器
英文描述: CMOS Image Sensor
中文描述: CMOS圖像傳感器
文件頁數(shù): 27/33頁
文件大?。?/td> 1481K
代理商: HV7131R
Confidential
HV7131R
MCLK Duty Cycle
This document is a general product description and is subject to change without notice. MagnaChip
Semiconductor Ltd. does not assume any responsibility for use of circuits described and no patent
licenses are implied.
- 27 -
2004 MagnaChip Semiconductor Ltd.
T
A
= 40% ~ 60% of T
MCLK,
T
B
= 40% ~ 60% of T
MCLK
, T
A
+ T
B
= T
MCLK
ENB Timing
ENB pin enables sensor. If you set ENB pin to low, sensor goes to power down. Though sensor
remains power down, you can program the registers by above IIC protocol. After ENB is
changed to high, the registers that you set in power down are newly updated.
If you want software power down with ENB pin high, set sleep mode in SCTRB(02H)register.
RESETB Timing
RESETB pin initializes the registers to default value. When RESETB pin is low, initialization is
done. HV7131GR is automatically reset the chip when power on.
We recommend to initialize the registers by using RESETB pin. T
R
: RESETB valid minimum
time: 10 MCLK periods.
MCLK
Output AC Characteristics
All output timing delays are measured with output load 60[pF]. Output delay includes the internal
MCLK
T
MCLK
T
B
T
A
V
DD
/ 2
T
R
RESETB
Sensor Ready to Operate
ENB
VSYNC
HSYNC
DATA[9:0]
VCLK
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