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參數(shù)資料
| 型號： | HV7131R |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | 圖像傳感器 |
| 英文描述： | CMOS Image Sensor |
| 中文描述： | CMOS圖像傳感器 |
| 文件頁數(shù)： | 23/33頁 |
| 文件大小： | 1481K |
| 代理商： | HV7131R |
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Confidential
HV7131R
This document is a general product description and is subject to change without notice. MagnaChip
Semiconductor Ltd. does not assume any responsibility for use of circuits described and no patent
licenses are implied.
- 23 -
2004 MagnaChip Semiconductor Ltd.
VGA Frame Timing Related Parameters
25Mhz
DCF/2 =12.5Mhz
208
Line Mode
Disable
Master Clock Frequency(MCF)
Sensor Clock Frequency(SCF)
HBLANK Value
VSYNC Mode
ABLC
Clock Division
Sensor Clock Period(SCP)
VBLANK Value
Line Clock Period(LCP)
Programmable Window
MCF/1 = 25Mhz
1/12.5Mhz = 80ns
8
848 SCPs
OFF
If Integration Time < Core Frame Time, Real Frame Time is
2(208 + 640)SCPs + 480(208 + 640)SCPs + 8(208 + 640)SCPs
= 415520 SCPs =415520 X 80ns = 33.24msec = 30fps
else Real Frame Time is
Integration Time * SCPs + 8 * (208 +640) SCPs.
HOLD SLOT in frame timing appears only if integration time is larger then core frame time
I2C Chip Interface
LCP(848SCPs)
IDLE SLOT(2LCP)
4th
Line Data Flow
5th
Line Data Flow
HOLD SLOT
Integration time – Core Frame Time
VBLANK[VSYNC] (8LCP)
HBLANK
(208 SCPs)
HSYNC(640 SCPs)
Active Data : 640 EA
Real Frame Time
Core Frame Time
480 LCPs
Video Height
HBLANK
(208 SCPs)
HSYNC(640 SCPs)
VCLK=12.5[Mhz]
LCP = 848 SCPs
482th
Line Data Flow
483th
Line Data Flow
Video Width(640SCP)
Hi - Z
Valid Data
DATA[9:0]
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HV7131RP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Image Sensor with Image Signal Processing |
| HV7141 | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:CMOS IMAGE SENSOR With 8-bit ADC |
| HV7141D | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:CMOS IMAGE SENSOR With 8-bit ADC |
| HV7151SP | 制造商:HYNIX 制造商全稱:Hynix Semiconductor 功能描述:CMOS Image Sensor with Image Signal Processing |
| HV7161SPA2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Image Sensor with Image Signal Processing |
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