參數(shù)資料
型號(hào)： HSP50214A
廠商： Intersil Corporation
英文描述： Programmable Downconverter
中文描述： 可編程變頻器
文件頁(yè)數(shù)： 50/60頁(yè)
文件大小： 467K
代理商： HSP50214A
50
CONTROL WORD 13: TIMING PHASE OFFSET (SYNCHRONIZED TO PROCCLK)
BIT
POSITION
FUNCTION
DESCRIPTION
31-8
Reserved
Reserved.
7-0
Timing NCO Phase
Offset
These bits are used to offset the phase of the Timing NCO. The range is 0 to 1 times the resa-
mpler input period interpreted either as
±
T/2 (2’s complement) or 0 to T (offset binary). Bit 7 is
the MSB. This location is a holding register. After loading, a transfer to the Active Register is
done by writing to Control Word 15 or by generating a SYNCIN2 with Control Word 11, Bit 5 set
to 1.
CONTROL WORD 14: TIMING FREQUENCY STROBE (SYNCHRONIZED TO PROCCLK)
BIT
POSITION
FUNCTION
DESCRIPTION
N/A
Timing Frequency
Strobe
Writing to this address updates the active timing NCO Frequency Register in the timing NCO
(see Timing NCO Section).
CONTROL WORD 15: TIMING PHASE STROBE (SYNCHRONIZED TO PROCCLK)
BIT
POSITION
FUNCTION
DESCRIPTION
N/A
Timing Phase Strobe
Writing to this address updates the active timing NCO Phase Offset Register in the timing NCO
(see Timing NCO Section).
CONTROL WORD 16: RESAMPLING FILTER CONTROL (SYNCHRONIZED TO PROCCLK)
BIT
POSITION
FUNCTION
DESCRIPTION
31-12
Reserved
Reserved.
11-4
Re-Sampler Output
Pulse Delay
NOTE: These bits program the delay between output samples when interpolating. The extra out-
puts can be delayed from 2 to 255 clocks from the first output. A delay of 2 equals 255
clocks of delay. A delay of 0 or 1 is an invalid mode. When interpolating by 2, one extra
output is generated; when interpolating by 4, 3 extra outputs are generated. Program by
the equation (PROCCLK/f
OUT
) - 1. Bit 11 is the MSB.
NOTE: If less than 5 is programmed, there will not be sufficient time to fully update the out-
put buffer. If less than 16 is programmed, the serial output may be preempted. This
means that it won’t finish and if the sync is programmed to follow the data, there
may never be a sync.
0- Resampling Filter Enabled. A valid combination of bits 2-0 must also be selected.
1- Resampling Filter Section (including Interpolation halfband filters) is bypassed.
3
Re-Sampler Bypass
2-0
Filter Mode Select;
2- HB2 Enabled
1- HB1 Enabled
0- Re-Sampler
Enabled
000- Not Valid.
001- Resampler Enabled.
010- Halfband 1 Enabled.
011- Resampler and Halfband Filter 1 Enabled.
100- Not Valid.
101- Not Valid.
110- Both Halfband Filters Enabled.
111- Resampler and Both Halfband Filters Enabled.
HSP50214A
相關(guān)PDF資料
PDF描述
HSP50214AVC Programmable Downconverter
HSP50214AVI Programmable Downconverter
HSP50214B Programmable Downconverter
HSP50214BVC Programmable Downconverter
HSP50214BVI Programmable Downconverter
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HSP50214AVC 制造商:Rochester Electronics LLC 功能描述:- Bulk
HSP50214AVI 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Programmable Downconverter
HSP50214B 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Programmable Downconverter
HSP50214B_07 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Programmable Downconverter
HSP50214BVC 功能描述:上下轉(zhuǎn)換器 120L MQFP COMTEMP 14-BIT PROGRAMMABLE DOWNCONVERTER 65MSPS RoHS:否 制造商:Texas Instruments 產(chǎn)品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PQFP-128
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