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參數(shù)資料
| 型號： | HSP50214A |
| 廠商： | Intersil Corporation |
| 英文描述： | Programmable Downconverter |
| 中文描述： | 可編程變頻器 |
| 文件頁數(shù)： | 39/60頁 |
| 文件大?。?/td> | 467K |
| 代理商： | HSP50214A |
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39
Rule #3: The FIFO is empty when the Read Address =
(Write Address -1) (the circuitry will not allow the read
pointer to be incremented).
Rule #4: You cannot write over what you have not read.
Rule #5: RESET places the Write address pointer = 000
and Read address pointer = 111.
Rule #6: The best addressing scheme is to read the FIFO
until it is empty. This avoids erroneous INTRRP assertions
and provides for simple FIFO depth monitoring. The interrupt
is generated when the depth increments past the threshold.
FIFO Operation via 8-Bit
μ
Processor
Interface
The Buffer RAM Output may also be accessed via the 8-bit
microprocessor interface C(7:0). Figure 41 shows the con-
ceptual configuration of the 8-bit
μ
processor interface. Con-
trol Word 20, Bit 24 must be set to 0 in order to obtain Buffer
RAM data to this output. The Microprocessor Read Section
describes how to read the data from each sample out of the
C(7:0) interface.
Recall that INTRRP stays low for 8 PROCCLK cycles. The
FIFO can be read before the INTRRP signal goes low; the
number of samples in the FIFO must be monitored by the user.
The timing relationship of the INTRRP to the snapshot data is
shown in Figure 42.
The read pointer of the FIFO is incremented when Control
Word 23 is written to. The data cannot be read from the
next sample until 4 PROCCLKs after the Buffer RAM
pointer has been incremented. Control Word 22 is used to
reset the Read and Write pointers of the Buffer RAM output
to the first sample to 000 and 007 for write and read
respectively.
FIGURE 40. FIFO REGISTER OPERATION
READ
WRITE
FIFO
DEPTH
WRITE
READ
READ
WRITE
WRITE
READ
READY
A: FIFO DEPTH IS (WRITE - READ)
B: FIFO FULL IS WHEN (WRITE - READ) = 7
C: FIFO EMPTY IS WHEN (WRITE - READ) = 1
D: FIFO READY IS WHEN (WRITE - READ) > DEPTH
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HSP50214A
相關PDF資料 |
PDF描述 |
|---|---|
| HSP50214AVC | Programmable Downconverter |
| HSP50214AVI | Programmable Downconverter |
| HSP50214B | Programmable Downconverter |
| HSP50214BVC | Programmable Downconverter |
| HSP50214BVI | Programmable Downconverter |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| HSP50214AVC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP50214AVI | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Programmable Downconverter |
| HSP50214B | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Programmable Downconverter |
| HSP50214B_07 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Programmable Downconverter |
| HSP50214BVC | 功能描述:上下轉換器 120L MQFP COMTEMP 14-BIT PROGRAMMABLE DOWNCONVERTER 65MSPS RoHS:否 制造商:Texas Instruments 產品:Down Converters 射頻:52 MHz to 78 MHz 中頻:300 MHz LO頻率: 功率增益: P1dB: 工作電源電壓:1.8 V, 3.3 V 工作電源電流:120 mA 最大功率耗散:1 W 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-128 |
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