參數(shù)資料
型號(hào): HMS81C4316
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代理商: HMS81C4316
HMS8132E/HMS81032TL
Nov. 2001 Ver 2.00
57
15.4 Operation of standby mode release
After standby mode is released, the operation begins ac-
cording to content of related interrupt register just before
standby mode start (Figure 15-3).
(1) Interrupt Enable Flag(I) of PSW = “0”
Release by only interrupt which interrupt enable flag =
“1”, and starts to execute from next to standby instruction
(SLEEP or STOP).
(2) Interrupt Enable Flag(I) of PSW = “1”
Released by only interrupt which each interrupt enable flag
= “1”, and jump to the relevant interrupt service routine.
Note:
When STOP instruction is used, B.I.T should guar-
antee the stabilization oscillation time. Thus, just before en-
tering STOP mode, clock of bit10 (PS10) of prescaler is
selected or peripheral hardware clock control bit (ENPCK)
to “1”, Therefore the clock necessary for stabilization oscil-
lation time should be input into B.I.T. otherwise, standby
mode is released by reset signal. In case of interrupt re-
quest flag and interrupt enable flag are both “1”, standby
mode is not entered.
.
Figure 15-3 Standby Mode Release Flow
STOP Command
Interrupt Request GEN.
Int. enable reg.
0
1
Standby Mode
PSW
I Flag
Standby Mode Release
Interrupt Service Routine
Standby Next Command
Execution
0
1
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