參數(shù)資料
型號: HMPVIDEVALISA
廠商: Intersil Corporation
英文描述: NTSC/PAL Video Decoder
中文描述: NTSC / PAL視頻解碼器
文件頁數(shù): 37/43頁
文件大?。?/td> 183K
代理商: HMPVIDEVALISA
37
C
19
I
Chrominance (C) video input. This input must be AC-coupled to the video signal (us-
ing a 1
μ
F capacitor) and terminated with a 75
resistor, as shown in the Applications
section. These components, and the corresponding anti-aliasing lowpass filter,
should be as close to this pin as possible for best performance. If not used, this pin
should be connected to AGND through a 0.1
μ
F capacitor.
YOUT
9
O
Analog output of the video multiplexer. This output should be lowpass filtered and in-
put via the YIN pin, as shown in the Applications section. The anti-aliasing lowpass
filter should be as close to YOUT and YIN as possible for best performance.
YIN
8
I
Analog input to the ADC.
GAIN_CTRL
28
I
Gain Control Input. A DC voltage is used to set the video amplifier’s gain, as shown
in Figure 2. The reference circuit should be as close to this pin as possible for best
performance.
DEC_T
78
I
Decoupling for A/D Converter Reference. A 0.1
μ
F capacitor should be connected be-
tween this pin and AGND, as shown in the Applications section. This capacitor should
be as close to this pin as possible for best performance.
DEC_L
30
I
Decoupling for A/D Converter Reference. A 0.1
μ
F capacitor should be connected be-
tween this pin and AGND, as shown in the Applications section. This capacitor should
be as close to this pin as possible for best performance.
LAGC_CAP
77
I
Capacitor connection for Luminance AGC Circuit. Controls the AGC loop time con-
stant. A 0.01
μ
F capacitor should be connected between this pin and AGND, as shown
in the Applications section. This capacitor should be as close to this pin as possible
for best performance.
LCAP
76
I
Capacitor connection for Luminance Clamp Circuit. Controls the clamp loop time con-
stant. A 0.047
μ
F capacitor should be connected between this pin and AGND, as
shown in the Applications section. This capacitor should be as close to this pin as
possible for best performance.
CCAP
29
I
Capacitor connection for Chrominance Clamp Circuit. Controls the clamp loop time
constant. A 0.047
μ
F capacitor should be connected between this pin and AGND, as
shown in the Applications section. This capacitor should be as close to this pin as
possible for best performance.
V
CC
26, 31,37, 52,
59, 68, 75, 79
I
Digital power supply pins. All V
CC
pins must be connected together.
GND
25, 33, 35, 36,
39, 46, 53, 62,
69, 72, 80
I
Digital ground pins. All GND pins must be connected together.
VAA
2, 12,14
I
Analog power supply pins. All VAA pins must be connected together.
AGND
1, 3, 10, 11,
15,16, 21, 22,
23, 24
I
Analog ground pins. All AGND pins must be connected together.
A/D TEST
17
O
A/D test pin. This pin must be left floating for proper operation.
NC
4, 18, 20, 32,
73, 74
No Connect pins. These pins must be left floating for proper operation.
Pin Description
(Continued)
PIN
NAME
PIN
NUMBER
INPUT/
OUTPUT
DESCRIPTION
HMP8115
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PDF描述
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