參數(shù)資料
型號(hào)： HM51S4265DTT-6
元件分類： DRAM
英文描述： 256K X 16 EDO DRAM, 60 ns, PDSO40
封裝： 0.400 INCH, PLASTIC, MO-133BA, TSOP2-44/40
文件頁(yè)數(shù)： 5/33頁(yè)
文件大?。?/td> 331K
代理商： HM51S4265DTT-6
HM514265D Series, HM51S4265D Series
13
EDO Page Mode Read-Modify-Write Cycle
HM514265D, HM51S4265D
-5
-6/-6R
-7
-8
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Min
Max
Unit
Notes
EDO page mode read-
modify-write cycle time
t
HPCM
57
—
66
—
77
—
86
—
ns
EDO page mode read-
modify-write cycle
CAS
precharge to
WE delay
time
t
CPW
45
—
52
—
60
—
67
—
ns
10, 20
Self Refresh Mode
HM51S4265D
-5
-6/-6R
-7
-8
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Min
Max
Unit
Notes
RAS pulse width
(self refresh)
t
RASS
100
—
100
—
100
—
100
—
ns
30, 31,
32, 33
RAS precharge time
(self refresh)
t
RPS
90
—
110
—
130
—
150
—
ns
CAS hold time
(self refresh)
t
CHS
–50
—
–50
—
–50
—
–50
—
ns
21
Notes: 1. AC measurements assume t
T = 2 ns, VIH = 3.0 V, VIL = 0.0 V
2. Assumes that t
RCD ≤ tRCD (max) and tRAD ≤ tRAD (max).
If t
RCD or tRAD is greater than the maximum
recommended value shown in this table, t
RAC exceeds the value shown.
3. Measured with a load circuit equivalent to 1 TTL loads and 50 pF.
4. Assumes that t
RCD ≥ tRCD (max) and tRAD ≤ tRAD (max).
5. Assumes that t
RCD ≤ tRCD (max) and tRAD ≥ tRAD (max).
6. t
OFF1 (max), tOFF2 (max), tOFR (max) and tWEZ (max) define the time at which the output achieves the
open circuit condition and is not referred to output voltage levels.
7. V
IH (min) and VIL (max) are reference levels for measuring timing of input signals.
Also, transition
times are measured between V
IH and VIL.
8. Operation with the t
RCD (max) limit insures that tRAC (max) can be met, tRCD (max) is specified as a
reference point only, if t
RCD is greater than the specified tRCD (max) limit, then access time is
controlled exclusively by t
CAC.
9. Operation with the t
RAD (max) limit insures that tRAC (max) can be met, tRAD (max) is specified as a
reference point only, if t
RAD is greater than the specified tRAD (max) limit, then access time is
controlled exclusively by t
AA.
10. t
WCS, t RWD, t CWD and t AWD are not restrictive operating parameters.
They are included in the data
sheet as electrical characteristics only: if t
WCS ≥ tWCS (min), the cycle is an early write cycle and the
data out pin will remain open circuit (high impedance) throughout the entire cycle; if t
RWD ≥ tRWD
(min), t
CWD ≥ tCWD (min), tAWD ≥ tAWD (min) and tCPW ≥ tCPW (min), the cycle is a read-modify-write and
the data output will contain data read from the selected cell; if neither of the above sets of
conditions is satisfied, the condition of the data out (at access time) is indeterminate.
相關(guān)PDF資料
PDF描述
HM55-21R47 1 ELEMENT, 0.47 uH, GENERAL PURPOSE INDUCTOR
HM628127HLJP-25 128K X 8 STANDARD SRAM, 25 ns, PDSO32
HM62W8128DLR-7 STANDARD SRAM, PDSO32
HM64-104R7 1 ELEMENT, 4.7 uH, GENERAL PURPOSE INDUCTOR, SMD
HM76-50R78G 1 ELEMENT, 0.78 uH, GENERAL PURPOSE INDUCTOR, SMD
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HM51W17805J-6GS 制造商:Hitachi 功能描述:
HM51W18160CLTT-6 制造商:Renesas Electronics Corporation 功能描述:
HM51W18165LTT6 制造商:HITACHI 功能描述:*
HM51W4260CLTT-6 制造商:Hitachi 功能描述:
HM5212165/2805 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Series 128M LVTTL Interface SDRAM 66 MHz 2-Mword X 16-Bit X4-Bank
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*