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參數資料
| 型號： | HM62W8128DLR-7 |
| 元件分類： | SRAM |
| 英文描述： | STANDARD SRAM, PDSO32 |
| 封裝： | 8 X 20 MM, PLASTIC, REVERSE, TSOP1-32 |
| 文件頁數： | 1/19頁 |
| 文件大?。?/td> | 142K |
| 代理商： | HM62W8128DLR-7 |
HM62W8128D Series
1 M SRAM (128-kword
× 8-bit)
ADE-203-998 (Z)
Preliminary, Rev. 0.0
Jan. 20, 1999
Description
The Hitachi HM62W8128D Series is 1-Mbit static RAM organized 131,072-kword
× 8-bit.
HM62W8128D Series has realized higher density, higher performance and low power consumption by
employing Hi-CMOS process technology. The HM62W8128D Series offers low power standby power
dissipation; therefore, it is suitable for battery backup systems. It has package variations of standard 32-
pin plastic SOP and standard 32-pin plastic TSOPI.
Features
Single 3.3 V supply: 3.3 V ± 0.3 V
Access time: 55 ns/70 ns (max)
Power dissipation
Active: 19.8 mW/MHz (typ)
Standby: 3.3 W (typ)
Completely static memory.
No clock or timing strobe required
Equal access and cycle times
Common data input and output
Three state output
Directly LV-TTL compatible all inputs
Battery backup operation
2 chip selection for battery backup
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