597
Data
CE
FWE
Address
Data
FO
6
FO
7
OE
WE
t
nxtc
t
wsts
t
nxtc
t
ces
t
ds
t
dh
t
wep
t
as
t
ah
t
ceh
Address
stable
Programming wait
Data transfer
1 byte to 128 bytes
H'40
Data
FO
0
to FO
5
= 0
t
f
t
r
t
spa
t
pns
t
write
(1 to 3000 ms)
Programming operation
end identification signal
Programming normal
end identification signal
t
pnh
Figure 17.31 Auto-Program Mode Timing Waveforms
Notes on Use of Auto-Program Mode
In auto-program mode, 128 bytes are programmed simultaneously. This should be carried out
by executing 128 consecutive byte transfers.
A 128-byte data transfer is necessary even when programming fewer than 128 bytes. In this
case, H'FF data must be written to the extra addresses.
The lower 8 bits of the transfer address must be H'00 or H'80. If a value other than an effective
address is input, processing will switch to a memory write operation but a write error will be
flagged.
Memory address transfer is performed in the second cycle (figure 17.31). Do not perform
memory address transfer after the second cycle.
Do not perform a command write during a programming operation.
Perform one auto-programming operation for a 128-byte block for each address.
Characteristics are not guaranteed for two or more programming operations.
Confirm normal end of auto-programming by checking FO
6
. Alternatively, status read mode
can also be used for this purpose (FO
7
status polling uses the auto-program operation end
identification pin).
The status polling FO
6
and FO
7
pin information is retained until the next command write. Until
the next command write is performed, reading is possible by enabling
CE
and
OE
.