參數(shù)資料
型號: HCD66717A03BP
廠商: Hitachi,Ltd.
元件分類: 晶體
英文描述: (Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver)
中文描述: (低功耗點陣液晶顯示控制器/驅(qū)動器)
文件頁數(shù): 80/90頁
文件大小: 716K
代理商: HCD66717A03BP
HD66717
532
AC Characteristics (V
CC
= 2.4V to 5.5V, T
a
= –20 to +75°C*
3
)
Clock Characteristics (V
CC
= 2.4V to 5.5V)
Item
External
clock
operation
Symbol Min
f
cp
Duty
t
rcp
t
fcp
Typ
160
50
160
Max
350
55
0.2
0.2
200
Unit
kHz
%
μs
μs
kHz
Test Condition Notes*
External clock frequency
External clock duty ratio
External clock rise time
External clock fall time
Clock oscillation frequency f
OSC
20
45
120
13
R
oscillation
Note:
R
f
= 150 k
,
V
CC
= 3V
14
*
Refer to the Electrical Characteristics Notes section following these tables.
Read & Write Bus Interface Timing Characteristics with Read Operation (V
CC
= 2.4V to 4.5V)
Item
Enable cycle time
Enable pulse width (high level)
Enable rise/fall time
Address set-up time (RS, R/W to E)
Address hold time
Data set-up time
Data hold time
Read data delay time
Read data hold time
Symbol Min
t
cycE
PW
EH
t
Er
, t
Ef
t
AS
t
AH
t
DSW
t
H
t
DDR
t
DHR
Typ
Max
25
400
Unit
ns
Test Condition
Figures 52
and 53
1000
450
60
20
195
30
5
ns
Figure 53
Read & Write Bus Interface Timing Characteristics with Read Operation (V
CC
= 4.5V to 5.5V)
Item
Enable cycle time
Symbol Min
t
CYCE
Typ
Max
Unit
ns
Test Condition
Figures 52
and 53
500
Enable pulse width (high level)
Enable rise/fall time
Address set-up time (RS, R/W to E)
Address hold time
Data set-up time
Data hold time
Read data delay time
Read data hold time
PW
EH
t
Er
, t
Ef
t
AS
t
AH
t
DSW
t
H
t
DDR
t
DHR
230
40
30
80
30
5
20
200
ns
Figure 53
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