參數(shù)資料
型號(hào)： HCD66717A03BP
廠商： Hitachi,Ltd.
元件分類： 晶體
英文描述： (Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver)
中文描述： （低功耗點(diǎn)陣液晶顯示控制器/驅(qū)動(dòng)器）
文件頁(yè)數(shù)： 38/90頁(yè)
文件大?。?/td> 716K
代理商： HCD66717A03BP
HD66717
490
Write Data to RAM
The write data to RAM instruction (Figure 20) writes 8-bit data to annunciator or DDRAM, or lower 5-bit
data to SEGRAM or CGRAM that is selected by the previous specification of the address set instruction
(annunciator/SEGRAM address set, CGRAM address set, or DDRAM address set).
After a write, the address is automatically incremented or decremented by 1 according to the I/D bit
setting in the entry mode instruction.
The annunciator address is not automatically updated; it must be specifically updated to write data to a
different address. During sleep and standby modes, DDRAM, CGRAM, or SEGRAM cannot be accessed.
Read Data from RAM
The read data from RAM instruction (Figure 21), reads 8-bit data from DDRAM, or 5-bit binary data
from CGRAM or SEGRAM that is selected by the previous specification of the address set instruction
(SEGRAM address set, CGRAM address set, or DDRAM address set). The unused upper three bits of
CGRAM or SEGRAM data are read as 000; annunciator data cannot be read. If no address is specified by
the address set instruction just before this instruction, the first data read will be invalid. When executing
serial read instructions, the next address is normally read from the next address.
After a read, the address is automatically incremented or decremented by 1 according to the I/D bit
setting in the entry mode instruction.
Table 17 lists the above instructions.
1
RS R/W DB7
DB0
0
D
D
D
D
D
D
D
D
Figure 20 Write Data to RAM Instruction
1
RS R/W DB7
DB0
1
D
D
D
D
D
D
D
D
Figure 21 Read Data from RAM Instruction
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