參數(shù)資料
型號： HCD66717A03BP
廠商： Hitachi,Ltd.
元件分類： 晶體
英文描述： (Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver)
中文描述： （低功耗點(diǎn)陣液晶顯示控制器/驅(qū)動(dòng)器）
文件頁數(shù)： 12/90頁
文件大小： 716K
代理商： HCD66717A03BP
HD66717
463
Block Function Description
System Interface
The HD66717 has four types of system interfaces: I
bus. The interface mode is selected by the IM1 and IM0 pins.
2
C bus, clock-synchronized serial, 4-bit bus, and 8-bit
The HD66717 has two 8-bit registers: an instruction register (IR) and a data register (DR).
The IR stores instruction codes, such as display clear, return home, and display control, and address
information for the display data RAM (DDRAM), the character generator RAM (CGRAM), and the
segment RAM (SEGRAM). The IR can only be written to by MPU and cannot be read from.
The DR temporarily stores data to be written into DDRAM, CGRAM, SEGRAM, or annunciator. Data
written into the DR from the MPU is automatically written into DDRAM, CGRAM, SEGRAM, or
annunciator by an internal operation. The DR is also used for data storage when reading data from
DDRAM, CGRAM, or SEGRAM. When address information is written into the IR, data is read and then
stored into the DR from DDRAM, CGRAM, or SEGRAM by an internal operation. Data transfer between
the MPU is then completed when the MPU reads the DR. After the read, data in DDRAM, CGRAM, or
SEGRAM at the next address is sent to the DR for the next read from the MPU.
These two registers can be selected by the register select (RS) signal in the 4/8-bit bus interface, and by
the RS bit in I
2
C bus or clock-synchronized serial interface (Table 2).
Busy Flag (BF)
When the busy flag is 1, the HD66717 is in the internal operation mode, and the next instruction will not
be accepted. When RS = low and R/W = high in 4/8-bit bus mode (Table 2), the busy flag is output from
DB7. The next instruction must be written after ensuring that the busy flag is 0. The busy flag cannot be
read in I
considering instruction execution times.
2
C bus mode or clock-synchronized serial mode; data must be transferred in appropriate timing
Address Counter (AC)
The address counter (AC) assigns addresses to DDRAM, CGRAM, or SEGRAM. When the address set
instruction is written into the IR, the address information is sent from the IR to the AC. Selection of
DDRAM, CGRAM, and SEGRAM is also determined concurrently by the instruction.
After writing into (reading from) DDRAM, CGRAM, or SEGRAM, the AC is automatically incremented
by 1 (or decremented by 1). The AC contents are then output to DB0 to DB6 when RS = low and R/W =
high in 4/8-bit bus mode (Table 2).
相關(guān)PDF資料
PDF描述
HCD66727A03 Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver with Key Scan Function
HCD66727A03BP Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver with Key Scan Function
HCD66727A04 Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver with Key Scan Function
HCD66727A04BP Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver with Key Scan Function
HCD66730A00 Dot-Matrix Liquid Crystal Display Controller/Driver Supporting Japanese Kanji, Korean Font Display
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HCD66717A13BP 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:(Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver)
HCD66724RA03BP 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LCD CONTROLLER
HCD66725A03BP 制造商:未知廠家 制造商全稱:未知廠家 功能描述:LCD CONTROLLER
HCD66727A03 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver with Key Scan Function
HCD66727A03BP 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver with Key Scan Function
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*