參數(shù)資料
型號(hào): HCD66717A03BP
廠商: Hitachi,Ltd.
元件分類: 晶體
英文描述: (Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver)
中文描述: (低功耗點(diǎn)陣液晶顯示控制器/驅(qū)動(dòng)器)
文件頁(yè)數(shù): 40/90頁(yè)
文件大?。?/td> 716K
代理商: HCD66717A03BP
HD66717
492
Table 17
Instruction List (cont)
Code
Execution
Cycle *
Instruction No.
R/W
RS
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0 Description
1
Write data
to RAM
WD
0
1
Write data
Writes data to DDRAM,
CGRAM, SEGRAM, or
annunciator.
10
Read data
from RAM
RD
1
1
Read data
Reads data from DDRAM,
CGRAM, or SEGRAM.
10
BF
I/D
OSC = 1:
B/W
B
D
DC
LC
AMP = 1:
STB
NL1,NL0:
= 1:
= 1:
Internally operating
Increment
System clock divided by four
Black-white inverting cursor on
Blink cursor on
Display on
Character display on
Line containing AC given cursor attribute
Voltage-follower and booster on
Standby mode
Number of display lines [00: 1line (1/10 duty ratio), 01: 2 lines (1/18 duty ratio),
10: 3 lines (1/26 duty ratio),11:4 lines (1/34 duty ratio)]
Double-height lines (DL1 = 1: 1st line, DL2 = 1: 2nd line, DL3 = 1: 3rd line)
Contrast adjustment
SN2 – SN0: Display-start line (000: 1st line, 001: 2nd line, 010: 3rd line, 011: 4th line, 100: 5th line)
SL2 – SL0: Display-start raster-row (000: 1st raster-row... 111: 8th raster-row)
DA
= 1:
Annunciator display on
AAN/A
SEG
= 0000–0010: Annunciator address
ACG4–ACG0: CGRAM address (00000–11111)
ADD6–ADD0: DDRAM address (0000000–1001011)
AC:
I/D
Address counter
= 0:
Decrement
= 1:
= 1:
= 1:
= 1:
= 1:
C
= 1:
8th raster-row cursor on
DS
= 1:
Segment display on
SLP
= 1:
Sleep mode
= 1:
DL3 – DL1:
CT3–CT0:
AAN/A
SEG
= 1000–1111: SEGRAM address
Note:
1. Represented by the number of operating clock pulses; the execution time depends on the
supplied clock frequency or the internal oscillation frequency.
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