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參數(shù)資料
| 型號： | HCD66717A03BP |
| 廠商： | Hitachi,Ltd. |
| 元件分類： | 晶體 |
| 英文描述： | (Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver) |
| 中文描述： | （低功耗點陣液晶顯示控制器/驅(qū)動器） |
| 文件頁數(shù)： | 48/90頁 |
| 文件大?。?/td> | 716K |
| 代理商： | HCD66717A03BP |
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HD66717
500
Interface with a 4-Bit MPU
Four-bit data can be transferred in parallel by setting both the IM1 and IM0 pins to the V
CC
level (Figure
26). Four-bit data representing higher or lower bits of 8-bit instructions or 8-bit RAM data can be
transferred in that order.
The HD66717 can forcibly reset the counter that counts the number of higher and lower 4-bit data
transfers in a 4-bit bus interface. This function, called transfer-syncronization, can be performed by
writing a special instruction containing 0000 four consecutive times (Figure 27). For example, when a
data transfer sequence becomes disordered due to noise or some undesired factor, this function resets the
counter and thus enables resuming data transfer from the higher 4 bits. Using this function at specified
intervals prevents display-system crash.
IR7
Busy
Not
Busy
IR3
AC3
AC3
D7
D3
Instruction write
Busy flag check
Internal operation
Busy flag check
Instruction write
R/W
E
Internal signal
DB7
RS
Figure 26 4-Bit Parallel Data Transfer Timing Sequence
0000
0000
0000
0000
RS
R/W
E
DB7–
DB0
Higher
Lower
(4-bit data transfer synchronized)
(1)
(2)
(3)
(4)
Figure 27 4-Bit Data Transfer Synchronization
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相關(guān)代理商/技術(shù)參數(shù) |
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| HCD66717A13BP | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:(Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver) |
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| HCD66727A03 | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver with Key Scan Function |
| HCD66727A03BP | 制造商:HITACHI 制造商全稱:Hitachi Semiconductor 功能描述:Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver with Key Scan Function |
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