參數(shù)資料
型號： HCD404669
廠商： Hitachi,Ltd.
英文描述： Low-Voltage AS Microcomputers with On-Chip DTMF Generation Circuit(帶雙音多頻電路的低電壓微計(jì)算機(jī))
中文描述： 低電壓如同在微機(jī)芯片的DTMF產(chǎn)生電路（帶雙音多頻電路的低電壓微計(jì)算機(jī)）
文件頁數(shù)： 70/142頁
文件大?。?/td> 894K
代理商： HCD404669
HD404669 Series
70
Timer D Operations:
Free-running/reload timer operation: The free-running/reload operation, input clock source, and
prescaler division ratio are selected by timer mode register D1 (TMD1: $010).
Timer D is initialized to the value set in timer write register D (TWDL: $011, TWDU: $012) by
software and incremented by one at each clock input. If an input clock is applied to timer D after it has
reached $FF, an overflow is generated. In this case, if the reload timer function is enabled, timer D is
initialized to its initial value set in timer write register D (TWDL: $011, TWDU: $012); if the free-
running timer function is enabled, the timer is initialized to $00 and then incremented again.
The timer D interrupt request flag (IFTD: $003, 0) is reset by the program, and by an MCU reset or a
transition to stop mode. For details, see figure 3, Configuration of Interrupt Control Bits and Register
Flag Areas, and table 1, Initial Values after MCU Reset.
External event counter operation: When external event input is designated for the input clock by timer
mode register D1 (TMD1), timer D operates as an external event counter.In this case, pin R4
0
/EVND
must be set to EVND by port mode register C (PMRC: $025).
Either falling or rising edge, or both falling and rising edges of input signals can be selected as the
external event detection edge by detection edge select register 2 (ESR2: $027). When both rising and
falling edges detection is selected, the time between the falling edge and rising edge of input signals
must be 2t
cyc
or longer.
Timer D is incremented by one at each detection edge selected by detection edge select register 2
(ESR2: $027). The other operation is basically the same as the free-running/reload timer operation.
Timer output operation: The following four output modes can be selected for timer D by setting timer
mode register D2 (TMD2: $015).
Toggle
Low-level output
Hige-level output
PWM output
Pin R3
2
/TOD is set to TOD.
Toggle output: The operation is basically the same as that of timer-C’s toggle output.
0 output: The operation is basically the same as that of timer-C’s 0 output.
1 output: The operation is basically the same as that of timer-C’s 1 output.
PWM output: The operation is basically the same as that of timer-C’s PWM output.
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