參數(shù)資料
型號： HCD404669
廠商： Hitachi,Ltd.
英文描述： Low-Voltage AS Microcomputers with On-Chip DTMF Generation Circuit(帶雙音多頻電路的低電壓微計算機(jī))
中文描述： 低電壓如同在微機(jī)芯片的DTMF產(chǎn)生電路（帶雙音多頻電路的低電壓微計算機(jī)）
文件頁數(shù)： 135/142頁
文件大?。?/td> 894K
代理商： HCD404669
HD404669 Series
135
Item
Symbol
Pin(s)
Min
Typ
Max
Unit
Test Condition
Notes
Analog comparator
stabilization time
t
CSTB
COMP
0
to
COMP
1
—
—
2
t
cyc
V
CC
= 2.2 V to 5.5V
10
—
—
10
t
cyc
V
CC
= 1.8 V to
less than 2.2V
Notes: 1. Set bits 0 and 1 (SSR10, SSR11) of system clock select register 1 (SSR1: $029) and bits 2 and
3 (SSR22, SSR23) of system clock select register 2 (SSR2: $02A) according to the system clock
frequency used.
2. Set bits 0 and 1 (SSR20, SSR21) of system clock select register 2 (SSR2: $02A) according to
the system clock frequency division ratio used.
3. Set bit 2 (SSR12) of system clock select register 1 (SSR1: $029) according to the subsystem
clock frequency division ratio used.
4. The oscillation stabilization time is defined as follows:
(1) The time required for the oscillation to settle after V
CC
has reached the minimum specification
value at power-on.
(2) The time required for the oscillation to settle after RESET input has gone high when stop
mode is cleared.
(3) The time required for the oscillation to settle after
STOPC
input has gone low when stop
mode is cleared.
To ensure enough time for the oscillation to settle at power-on or when stop mode is cleared,
input the RESET or
STOPC
signal for at least time t
. The oscillation stabilization time will
depend on the circuit constants and stray capacitance. The oscillator should be determined in
consultation with the oscillator manufacturer.
5. Set bits 0 and 1 (MIS0, MIS1) in the miscellaneous register (MIS: $00C) according to the
oscillation stabilization time of the system oscillator.
6. See figure 91.
7. See figure 92.
Unit t
cyc
applies when the MCU is in standby mode or active mode.
Unit t
subcyc
applies when the MCU is in watch mode or subactive mode.
8. See figure 93.
9. See figure 94.
10. This is the time required for the analog comparator to settle, ensuring that the correct data is
read, after pins RD
0
/COMP
0
and RD
1
/COMP
1
are set to analog input mode.
11. Applies to the HD40A4668, HD40A46612, HD40A4669, and HD407A4669. The test condition is
V
CC
= 4.0 to 5.5 V.
12. Applies to the HD404668, HD4046612, HD404669, HCD404669, HD40A4668, HD40A46612,
and HD40A4669. The test condition is V
CC
= 2.0 to 5.5 V.
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