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參數(shù)資料
| 型號： | HC5515CMZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SLIC ITU CO/PABX LP 28-PLCC |
| 標(biāo)準(zhǔn)包裝： | 925 |
| 功能： | 用戶線路接口概念（SLIC） |
| 電路數(shù)： | 1 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 功率（瓦特）： | 1.5W |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 28-PLCC（11.51x11.51） |
| 包裝： | 管件 |
| 包括： | 可編程回路電流檢測器，振鈴?fù)禉z測器，熱關(guān)機(jī) |
16
FN4235.6
June 6, 2006
3.4kHz and compare to 1kHz reading.
VTR and ERX are defined in Figure 9.
18. Four-Wire to Four-Wire Frequency Response - The
4-wire
to 4-wire frequency response is measured with respect to
ERX = 0dBm at 1.0kHz, EG = 0V, IDCMET = 23mA. The
frequency response is computed using the following equation:
F4-4 = 20 log (VTX/ERX), vary frequency from 300Hz to
3.4kHz and compare to 1kHz reading.
VTX and ERX are defined in Figure 9.
19. Two-Wire to Four-Wire Insertion Loss - The 2-wire to 4-wire
insertion loss is measured with respect to EG = 0dBm at 1.0kHz
input signal, ERX = 0, IDCMET = 23mA and is computed using
the following equation:
L2-4 = 20 log (VTX/VTR)
where: VTX, VTR, and EG are defined in Figure 9. (Note: The
fuse resistors, RF , impact the insertion loss. The specified
insertion loss is for RF = 0).
20. Four-Wire to Two-Wire Insertion Loss - The 4-wire to 2-wire
insertion loss is measured based upon ERX = 0dBm, 1.0kHz
input signal, EG = 0, IDCMET = 23mA and is computed using
the following equation:
L4-2 = 20 log (VTR/ERX),
where: VTR and ERX are defined in Figure 9.
21. Two-Wire to Four-Wire Gain Tracking - The 2-wire to 4-wire
gain tracking is referenced to measurements taken for
EG = -10dBm, 1.0kHz signal, ERX = 0, IDCMET = 23mA and is
computed using the following equation.
G2-4 = 20 log (VTX/VTR) vary amplitude -40dBm to +3dBm, or
-55dBm to -40dBm and compare to -10dBm reading.
VTX and VTR are defined in Figure 9.
22. Four-Wire to Two-Wire Gain Tracking - The 4-wire to 2-wire
gain tracking is referenced to measurements taken for
ERX = -10dBm, 1.0kHz signal, EG = 0, IDCMET = 23mA and is
computed using the following equation:
G4-2 = 20 log (VTR/ERX) vary amplitude -40dBm to +3dBm, or
-55dBm to -40dBm and compare to -10dBm reading.
VTR and ERX are defined in Figure 9. The level is specified at
the 4-wire receive port and referenced to a 600
impedance
level.
23. Two-Wire Idle Channel Noise - The 2-wire idle channel noise
at VTR is specified with the 2-wire port terminated in 600 (RL)
and with the 4-wire receive port grounded (Reference Figure 10).
24. Four-Wire Idle Channel Noise - The 4-wire idle channel noise
at VTX is specified with the 2-wire port terminated in 600 (RL).
The noise specification is with respect to a 600
impedance
level at VTX. The 4-wire receive port is grounded (Reference
Figure 10).
25. Harmonic Distortion (2-Wire to 4-Wire) - The
harmonic
distortion is measured with the following conditions.
EG = 0dBm at 1kHz, IDCMET = 23mA. Measurement taken at
VTX. (Reference Figure 7).
26. Harmonic Distortion (4-Wire to 2-Wire) - The
harmonic
distortion is measured with the following conditions. ERX =
0dBm0. Vary frequency between 300Hz and 3.4kHz, IDCMET =
23mA. Measurement taken at VTR. (Reference Figure 9).
27. Constant Loop Current - The
constant
loop
current
is
calculated using the following equation:
IL = 2500 / (RDC1 + RDC2).
28. Standby State Loop Current - The standby state loop current
is calculated using the following equation:
IL = [|VBAT| - 3] / [RL +1800], TA = 25°C.
29. Power Supply Rejection Ratio - Inject a 100mVRMS signal
(50Hz to 4kHz) on VBAT, VCC and VEE supplies. PSRR is
computed using the following equation:
PSRR = 20
log (VTX/VIN). VTX and VIN are defined in Figure 11.
Pin Descriptions
PLCC
SYMBOL
DESCRIPTION
1RINGSENSE Internally connected to output of RING power amplifier.
2
BGND
Battery Ground - To be connected to zero potential. All loop current and longitudinal current flow from this ground.
Internally separate from AGND but it is recommended that it is connected to the same potential as AGND.
4VCC
+5V power supply.
5
RINGRLY
Ring relay driver output.
6VBAT
Battery supply voltage, -24V to -56V.
7RSG
Saturation guard programming resistor pin.
8
NC
This pin is used during manufacturing. This pin is to be left open for proper SLIC operation.
9
E0
TTL compatible logic input. Enables the DET output when set to logic level zero and disables DET output when set to
a logic level one.
11
DET
Detector output. TTL compatible logic output. A zero logic level indicates that the selected detector was triggered (see
Truth Table for selection of Ground Key detector, Loop Current detector or the Ring Trip detector). The DET output is
an open collector with an internal pull-up of approximately 15k
to VCC.
12
C2
TTL compatible logic input. The logic states of C1 and C2 determine the operating states (Open Circuit, Active, Ringing
or Standby) of the SLIC.
HC5515
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