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參數(shù)資料
| 型號： | HC5515CMZ |
| 廠商： | Intersil |
| 文件頁數(shù)： | 7/20頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SLIC ITU CO/PABX LP 28-PLCC |
| 標(biāo)準(zhǔn)包裝： | 925 |
| 功能： | 用戶線路接口概念（SLIC） |
| 電路數(shù)： | 1 |
| 電源電壓： | 4.75 V ~ 5.25 V |
| 功率（瓦特）： | 1.5W |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 28-PLCC（11.51x11.51） |
| 包裝： | 管件 |
| 包括： | 可編程回路電流檢測器，振鈴?fù)禉z測器，熱關(guān)機 |
15
FN4235.6
June 6, 2006
SLIC Operating States
Notes
2. Overload Level (Two-Wire port) - The
overload
level
is
specified at the 2-wire port (VTR0) with the signal source at the
4-wire receive port (ERX). IDCMET = 30mA, RSG = 4k,
increase the amplitude of ERX until 1% THD is measured at
VTRO. Reference Figure 1.
3. Longitudinal Impedance - The longitudinal impedance is
computed using the following equations, where TIP and RING
voltages are referenced to ground. LZT, LZR, VT, VR, AR and
AT are defined in Figure 2.
(TIP) LZT = VT/AT,
(RING) LZR = VR/AR,
where: EL = 1VRMS (0Hz to 100Hz).
4. Longitudinal Current Limit (Off-Hook Active) - Off-Hook
(Active, C1 = 1, C2 = 0) longitudinal current limit is determined
by increasing the amplitude of EL (Figure 3A) until the 2-wire
longitudinal balance drops below 45dB. DET pin remains low
(no false detection).
5. Longitudinal Current Limit (On-Hook Standby) - On-Hook
(Active, C1 = 1, C2 = 1) longitudinal current limit is determined
by increasing the amplitude of EL (Figure 3B) until the 2-wire
longitudinal balance drops below 45dB. DET pin remains high
(no false detection).
6. Longitudinal to Metallic Balance - The longitudinal to metallic
balance is computed using the following equation:
BLME = 20
log (EL/VTR), where: EL and VTR are defined in
Figure 4.
7. Metallic to Longitudinal FCC Part 68, Para 68.310 - The
metallic to longitudinal balance is defined in this spec.
8. Longitudinal to Four-Wire Balance - The longitudinal to 4-wire
balance is computed using the following equation:
BLFE = 20
log (EL/VTX),: EL and VTX are defined in Figure 4.
9. Metallic to Longitudinal Balance - The metallic to
longitudinal balance is computed using the following equation:
BMLE = 20
log (ETR/VL), ERX = 0,
where: ETR, VL and ERX are defined in Figure 5.
10. Four-Wire to Longitudinal Balance - The 4-wire to longitudinal
balance is computed using the following equation:
BFLE = 20
log (ERX/VL), ETR = source is removed.
where: ERX, VL and ETR are defined in Figure 5.
11. Two-Wire Return Loss - The 2-wire return loss is computed
using the following equation:
r = -20
log (2VM/VS).
where: ZD = The desired impedance; e.g., the characteristic
impedance of the line, nominally 600
. (Reference Figure 6).
12. Overload Level (4-Wire port) - The overload level is specified
at the 4-wire transmit port (VTXO) with the signal source (EG) at
the 2-wire port, IDCMET = 23mA, ZL = 20k, RSG = 4k (Refer-
ence Figure 7). Increase the amplitude of EG until 1% THD is
measured at VTXO. Note that the gain from the 2-wire port to
the 4-wire port is equal to 1.
13. Output Offset Voltage - The output offset voltage is specified
with the following conditions: EG = 0, IDCMET = 23mA, ZL = ∞
and is measured at VTX. EG, IDCMET, VTX and ZL are defined
in Figure 7. Note: IDCMET is established with a series 600
resistor between tip and ring.
14. Two-Wire to Four-Wire (Metallic to VTX) Voltage Gain - The
2-wire to 4-wire (metallic to VTX) voltage gain is computed
using the following equation.
G2-4 = (VTX/VTR), EG = 0dBm0, VTX, VTR, and EG are defined
in Figure 7.
15. Current Gain RSN to Metallic - The current gain RSN to
Metallic is computed using the following equation:
K = IM [(RDC1 + RDC2)/(VRDC - VRSN)] K, IM, RDC1, RDC2,
VRDC and VRSN are defined in Figure 8.
16. Two-Wire to Four-Wire Frequency Response - The 2-wire to
4-wire frequency response is measured with respect to
EG = 0dBm at 1.0kHz, ERX = 0V, IDCMET = 23mA. The
frequency response is computed using the following equation:
F2-4 = 20 log (VTX/VTR), vary frequency from 300Hz to
3.4kHz and compare to 1kHz reading.
VTX, VTR, and EG are defined in Figure 9.
17. Four-Wire to Two-Wire Frequency Response - The 4-wire to
2-wire frequency response is measured with respect to
ERX = 0dBm at 1.0kHz, EG = 0V, IDCMET = 23mA. The
frequency response is computed using the following equation:
F4-2 = 20 log (VTR/ERX), vary frequency from 300Hz to
TABLE 1. LOGIC TRUTH TABLE
E0
C1
C2
SLIC OPERATING STATE
ACTIVE DETECTOR
DET OUTPUT
0
Open Circuit
No Active Detector
Logic Level High
0
1
Active
Loop Current Detector
Loop Current Status
0
1
0
Ringing
Ring Trip Detector
Ring Trip Status
0
1
Standby
Loop Current Detector
Loop Current Status
1
0
Open Circuit
No Active Detector
Logic Level High
1
0
1
Active
Loop Current Detector
1
0
Ringing
Ring Trip Detector
1
Standby
Loop Current Detector
HC5515
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