參數(shù)資料
型號(hào)： GS881E36CGD-250IT
廠商： GSI TECHNOLOGY
元件分類： SRAM
英文描述： 256K X 36 CACHE SRAM, 5.5 ns, PBGA165
封裝： 13 X 15 MM, 1 MM PITCH, ROHS COMPLIANT, FPBGA-165
文件頁(yè)數(shù)： 9/39頁(yè)
文件大?。?/td> 1302K
代理商： GS881E36CGD-250IT
GS881E18C(T/D)/GS881E32C(T/D)/GS881E36C(T/D)
Rev: 1.01 6/2010
17/39
2008, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
VDD2 Range Logic Levels
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
Input High Voltage
VIH
0.6*VDD
—
VDD + 0.3
V
—
Input Low Voltage
VIL
–0.3
—
0.3*VDD
V
—
Notes:
1. Input Under/overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
2. VIHQ (max) is voltage on VDDQ pins plus 0.3 V.
Recommended Operating Temperatures
Parameter
Symbol
Min.
Typ.
Max.
Unit
Notes
Ambient Temperature (Commercial Range Versions)
TA
0
25
70
°C
2
Ambient Temperature (Industrial Range Versions)
TA
–40
25
85
°C
2
Notes:
1. The part numbers of Industrial Temperature Range versions end with the character “I”. Unless otherwise noted, all performance
specifications quoted are evaluated for worst case in the temperature range marked on the device.
2. Input Under/overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
50% tKC
VSS – 2.0 V
50%
VSS
VIH
Undershoot Measurement and Timing
Overshoot Measurement and Timing
50% tKC
VDD + 2.0 V
50%
VDD
VIL
Capacitance
oC, f = 1 MHZ, VDD = 2.5 V)
Parameter
Symbol
Test conditions
Typ.
Max.
Unit
Input Capacitance
CIN
VIN = 0 V
4
5
pF
Input/Output Capacitance
CI/O
VOUT = 0 V
6
7
pF
Note:
These parameters are sample tested.
(TA = 25
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