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參數(shù)資料
| 型號： | GS8150V36AB-300IT |
| 廠商： | GSI TECHNOLOGY |
| 元件分類： | SRAM |
| 英文描述： | 512K X 36 LATE-WRITE SRAM, 1.6 ns, PBGA119 |
| 封裝： | FBGA-119 |
| 文件頁數(shù)： | 20/25頁 |
| 文件大?。?/td> | 885K |
| 代理商： | GS8150V36AB-300IT |
GS8150V18/36AB-357/333/300/250
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 1.08 9/2008
4/25
2003, GSI Technology
Read Operations
Pipelined Read
A read cycle begins when the RAM captures logic 0 on SS and logic 1 on SW at the rising edge of K (and the falling edge of K).
Address inputs captured on that clock edge are propigated into the RAM, which delivers data to the input of the output registers.
The second rising edge of K fires the output registers and releases read data to the output drivers. If G is held active low, the
drivers drive the data onto the output pins. Read data is sustained on the output pins as long as G is held low or until the next rising
edge of K, at which point the outputs may update to new data or deselect, depending on what control command was registered at
the second rising edge of K.
GS8150V18/36 BGA Pin Description
Symbol
Type
Description
A
I
Address Inputs
DQA
DQB
DQC
DQD
I/O
Data Input and Output pins
BA, BB, BC, BD
I
Byte Write Enable for DQA, DQB, DQC, DQD I/Os; active low
NC
—
No Connect
CK
I
Clock Input Signal; active high
CK
I
Clock Input Signal; active low
SW
I
Write Enable; active low
G
I
Output Enable; active low
ZZ
I
Sleep mode control; active high
M1
I
Read Operation Protocol Select—Selects Register-Register read operations; must be tied low in this
device
M2
I
Read Operation Protocol Select—Selects Register-Register read operations; must be tied high in this
device
ZQ
I
FLXDrive-II Output Impedance Control
SS
I
Synchronous Select Input
TMS
I
Scan Test Mode Select
TDI
I
Scan Test Data In
TDO
O
Scan Test Data Out
TCK
I
Scan Test Clock
VREF
I
Input Reference Voltage
VDD
I
Core power supply
VSS
I
I/O and Core Ground
VDDQ
I
Output driver power supply
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GS8150V36AB-333 | 制造商:GSI Technology 功能描述:GS8150V36AB-333 - Trays |
| GS8150V36AB-333I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM |
| GS8150V36AB-357 | 制造商:GSI Technology 功能描述:GS8150V36AB-357 - Trays |
| GS8150V36AB-357I | 制造商:GSI 制造商全稱:GSI Technology 功能描述:1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM |
| GS8150V36AGB-250 | 制造商:GSI 制造商全稱:GSI Technology 功能描述:1M x 18, 512K x 36 18Mb Register-Register Late Write SRAM |
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