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參數(shù)資料
| 型號(hào)： | GMZAN3L |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | XGA ALALOG INTERFACE LCD MONITOR CONTROLLER |
| 中文描述： | ALALOG的XGA液晶顯示器接口控制器 |
| 文件頁(yè)數(shù)： | 43/53頁(yè) |
| 文件大小： | 556K |
| 代理商： | GMZAN3L |
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gmZAN3 Preliminary Data Sheet
C0523-DAT-01G
48
July 2003
Ge nes i s Microc hip Confid e n tia l
http:// w ww . g enesis-mic r ochip.com
Table 23.
gmZAN3T DC Characteristics
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
POWER
Power Consumption @ 95 MHz ACLK
(4)
PXGA
0.812
W
Power Consumption @ Low Power Mode
(1)
PLP
0.025
W
3.3V Supply Voltages (AVDD and RVDD)
VVDD_3.3
3.15
3.3
3.45
V
1.8V Supply Voltages (VDD and CVDD)
VVDD_1.8
1.71
1.8
1.89
V
Supply Current @ Low Power Mode
(1)
ILP
9
mA
Supply Current @ 95 MHz ACLK
1.8V supply (2)
3.3V supply (3)
IZAN3_XGA
178
149
mA
INPUTS
High Voltage
VIH
2.0
VDD
V
Low Voltage
VIL
GND
0.8
V
Clock High Voltage
VIHC
2.4
VDD
V
Clock Low Voltage
VILC
GND
0.4
V
High Current (VIN = 5.0 V)
IIH
-25
25
A
Low Current (VIN = 0.8 V)
IIL
-25
25
A
Capacitance (VIN = 2.4 V)
CIN
8
pF
OUTPUTS
High Voltage (IOH = 7 mA)
VOH
2.4
VDD
V
Low Voltage (IOL = -7 mA)
VOL
GND
0.4
V
Tri-State Leakage Current
IOZ
-25
25
A
NOTES:
(4) Low power mode or Suspend mode figures measured by shutting down all the blocks including the ADC. The
CYSNC/SOG is the only block turned on to detect Sync signals.
(5) Includes pins CVDD_1.8, VDD_ADC_1.8 and VDD_RPLL_1.8.
(6) Includes pins RVDD_3.3, AVDD_RED_3.3, AVDD_GREEN_3.3, AVDD_BLUE_3.3, AVDD_ADC_3.3, AVDD_3.3,
AVDD_RPLL_3.3, AVDD_OUT_LV_3.3 and AVDD_LV_3.3.
(4) XGA input at 85Hz with on/off pattern to XGA output operating at room temperature
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