參數(shù)資料
型號(hào): GMZAN3L
廠商: Electronic Theatre Controls, Inc.
英文描述: XGA ALALOG INTERFACE LCD MONITOR CONTROLLER
中文描述: ALALOG的XGA液晶顯示器接口控制器
文件頁數(shù): 19/53頁
文件大?。?/td> 556K
代理商: GMZAN3L
gmZAN3 Preliminary Data Sheet
C0523-DAT-01G
26
July 2003
Ge nes i s Microc hip Confid e n tia l
http:// w ww . g enesis-mic r ochip.com
Note:
The RESETn pin may also be connected to an external momentary contact switch to
ground, for a Reset Button feature.
When analog 3.3V reaches the reset threshold (2.5V) an active LOW reset signal is
generated (RESETn). The duration of the reset pulse is about 120ms.
The RESET_OUT is active HIGH output pulse held high while RESETn is LOW
When +3.3V_AVDD drops below 2.5V a reset signal is generated. The reset signal gets
de-asserted about 120ms after the input voltage rises above the 2.5V threshold (see figure
12).
The following table shows the temperature/voltage variation effects on the RESETn
timing (TRESETn).
Table 13.
Temperature and Voltage variations for TRESETn
Voltage
0°C
Room Temperature
100°C
3.0V
3.3V
3.6V
107 ms
119 ms
123 ms
105 ms
118 ms
123 ms
110 ms
119 ms
126 ms
4.3 Analog to Digital Converter
The gmZAN3chip has three ADC’s (analog-to-digital converters), one for each color (red, green, and
blue).
4.3.1 ADC Pin Connection
The analog RGB signals are connected to the gmZAN3 as described below:
Table 14.
Pin Connection for RGB Input with HSYNC/VSYNC
Pin Name
ADC Signal Name
Red+
Red
Red-
Terminate as illustrated in Figure 13
SOG_MCSS
Dedicated Sync-on-Green pin (for sync-tip clamping)
Green+
Green
Green-
Terminate as illustrated in Figure 13
Blue+
Blue
Blue-
Terminate as illustrated in Figure 13
HSYNC
Horizontal Sync (Terminate as illustrated in Figure 13)
VSYNC
Vertical Sync (Terminate as with HSYNC illustrated in Figure 13)
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