參數(shù)資料
型號: FLEX8000
廠商: Altera Corporation
英文描述: PROGRAMMABLE LOGIC DEVICES FAMILY
中文描述: 系列可編程邏輯元件
文件頁數(shù): 26/61頁
文件大?。?/td> 979K
代理商: FLEX8000
26
Altera Corporation
FLEX 8000 Programmable Logic Device Family Data Sheet
f
For detailed information on JTAG operation in FLEX 8000 devices, refer to
Application Note 39 (JTAG Boundary-Scan Testing in Altera Devices)
.
Generic Testing
Each FLEX 8000 device is functionally tested and specified by Altera.
Complete testing of each configurable SRAM bit and all logic
functionality ensures 100
%
configuration yield. AC test measurements for
FLEX 8000 devices are made under conditions equivalent to those shown
in
Figure 15
. Designers can use multiple test patterns to configure devices
during all stages of the production flow.
Table 7. JTAG Timing Parameters & Values
Symbol
Parameter
EPF8282A
EPF8282AV
EPF8636A
EPF8820A
EPF81500A
Unit
Min
Max
t
JCP
t
JCH
t
JCL
t
JPSU
t
JPH
t
JPCO
t
JPZX
t
JPXZ
t
JSSU
t
JSH
t
JSCO
t
JSZX
t
JSXZ
TCK
clock period
TCK
clock high time
TCK
clock low time
JTAG port setup time
JTAG port hold time
JTAG port clock to output
JTAG port high-impedance to valid output
JTAG port valid output to high-impedance
Capture register setup time
Capture register hold time
Update register clock to output
Update register high-impedance to valid output
Update register valid output to high-impedance
100
50
50
20
45
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
25
25
25
20
45
35
35
35
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