參數(shù)資料
型號(hào): FAN6921MLMY
廠商: Fairchild Semiconductor
文件頁(yè)數(shù): 21/23頁(yè)
文件大?。?/td> 1764K
描述: IC CTLR PFC/FLYBACK 16-SOICN
標(biāo)準(zhǔn)包裝: 2,500
模式: 臨界傳導(dǎo)(CRM)
電流 - 啟動(dòng): 10µA
電源電壓: 8.5 V ~ 25 V
工作溫度: -40°C ~ 105°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC N
包裝: 帶卷 (TR)
 
?2010 Fairchild Semiconductor Corporation
 
www.fairchildsemi.com
FAN6921ML " Rev. 1.0.3
21
 
Open-Loop, Short-Circuit, and Overload Protection
(FB Pin)
Referring to Figure 45, outside of FAN6921ML; the FB
pin is connected to the collector of transistor of an opto-
coupler. Inside of FAN6921ML, the FB pin is connected
to an internal voltage bias through a resistor of ~5 kW.
As the output loading is increased, the output voltage is
decreased and the sink current of transistor of opto-
coupler on primary side is reduced. So the FB pin
voltage is increased by internal voltage bias. In the case
of an open loop, output short circuit, or overload
conditions; this sink current is further reduced and the
FB pin voltage is pulled to high level by internal bias
voltage. When the FB pin voltage is higher than 4.2 V
for 50ms, the FB pin protection is activated.
FB
V
O
Open-loop
Short-circuit / overload
 
Figure 45. FB Pin Open-Loop, Short Circuit,
and Overload Protections
Under-Voltage Lockout (UVLO, VDD Pin)
Referring to Figure 36 and Figure 37, the turn-on and
turn-off V
DD
  threshold voltages are fixed at 18 V and
10 V, respectively. During startup, the hold-up capacitor
(V
DD
  capacitor) is charged by the HV startup current
until V
DD
 voltage reaches the turn-on voltage. Before the
output voltage rises to rated voltage and delivers energy
to the V
DD
 capacitor from auxiliary winding, this hold-up
capacitor has to sustain the V
DD
  voltage energy for
operation. When V
DD
  voltage reaches turn-on voltage,
FAN6921ML   starts   all   switching   operation   if   no
protection is triggered before V
DD
 voltage drops to turn-
off voltage V
DD-PWM-OFF
.
 
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