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參數(shù)資料
| 型號(hào)： | FAB2210UCX |
| 廠商： | Fairchild Semiconductor |
| 文件頁數(shù)： | 15/26頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC SUBSYSTEM HDPH AMP G 20-WLCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | D 類；G 類 |
| 輸出類型： | 1-通道（單聲道），帶立體聲耳機(jī) |
| 在某負(fù)載時(shí)最大輸出功率 x 通道數(shù)量： | 3.3W x 1 @ 8 歐姆; 29mW x 2 @ 32 歐姆 |
| 電源電壓： | 2.8 V ~ 5.25 V |
| 特點(diǎn)： | 消除爆音，差分輸入，I²C，靜音，短路和熱保護(hù)，關(guān)機(jī)，音量控制 |
| 安裝類型： | 表面貼裝 |
| 供應(yīng)商設(shè)備封裝： | 20-WLCSP |
| 封裝/外殼： | 20-UFBGA，WLCSP |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | FAB2210UCXFSDKR |
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30
9614A–AT42–08/10
AT42QT2161
However, an obstruction over the sense pad, for which the sensor has already made full
allowance, could suddenly be removed leaving the sensor with an artificially suppressed
reference level and thus become insensitive to touch. In this latter case, the sensor should
compensate for the object's removal by raising the reference level relatively quickly (PDRIFT).
Drift compensation and the detection time-outs work together to provide for robust, adaptive
sensing. The time-outs provide abrupt changes in reference calibration depending on the
duration of the signal 'event'.
If PDRIFT or NDRIFT is set to 0 then the drift compensation in the respective direction is
disabled.
Note: it is recommended that the drift compensation rate be more than four times the LP mode
period. This is to prevent undersampling, which decreases the algorithm's efficiency.
Default NDRIFT: 20 (3.2s/reference level)
Default PDRIFT: 5 (0.8s/reference level)
6.14
Address 17: Detect Integrator
NDIL is used to provide signal filtering.
To suppress false detections caused by spurious events like electrical noise, the device
incorporates a 'detection integrator' or DI counter mechanism. A per-key counter is incremented
each time the key has exceeded its threshold and stayed there for a number of acquisitions in
succession, without going below the threshold level. When this counter reaches a preset limit
the key is finally declared to be touched.
If on any acquisition the signal is not seen to exceed the threshold level, the counter is cleared
and the process has to start from the beginning.
The QT2161 has a built in minimum of 1 DI counts in addition to the NDIL value. Therefore, if
setting a NDIL value of 3, the actual number of consecutive acquisitions is 4.
Available NDIL values are from 1 to 31.
Default: 3 (4 DI value)
6.15
Address 18: Negative Recal Delay
If an object unintentionally contacts a key resulting in a detection for a prolonged interval it is
usually desirable to recalibrate the key in order to restore its function, perhaps after a time delay
of some seconds.
Table 6-14.
Detect Integrator
Address
b7b6b5
b4b3b2b1
b0
17
000
NDIL
Table 6-15.
Negative Recal Delay
Address
b7b6b5
b4b3b2b1
b0
18
NRD
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