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| 型號(hào)： | EVAL-ADV7180LQEBZ |
| 廠商： | Analog Devices Inc |
| 文件頁(yè)數(shù)： | 85/116頁(yè) |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION ADV7180 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | Advantiv® |
| 主要目的： | 視頻，SDTV 視頻解碼器 - NTSC，PAL，SECAM |
| 嵌入式： | 否 |
| 已用 IC / 零件： | ADV7180 |
| 主要屬性： | CVBS（復(fù)合），Y/C（S 視頻）和 YPrPb（元件）輸入 |
| 次要屬性： | 8 位 ITU-R BT.656 YCrCb 4:2:2 輸出 |
| 已供物品： | 板 |
| 相關(guān)產(chǎn)品： | ADV7180BCPZ-REEL-ND - IC VIDEO DECODER SDTV 40-LFCSP ADV7180BSTZ-ND - IC VIDEO DECODER SDTV 64-LQFP ADV7180BCPZ-ND - IC VIDEO DECODER SDTV 40-LFCSP |
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ADV7180
Data Sheet
Rev. I | Page 70 of 116
Gemstar Bit Names
The following are the Gemstar bit names:
DID—The data identification value is 0x140 (10-bit value).
Care is taken so that in 8-bit systems, the two LSBs do not
carry vital information.
EP and EP—The EP bit is set to ensure even parity on the
D[8:0] data-word. Even parity means there is always an
even number of 1s within the D[8:0] bit arrangement. This
includes the EP bit. EP describes the logic inverse of EP
and is output on D[9]. The EP is output to ensure that the
reserved codes of 00 and FF do not occur.
EF—Even field identifier. EF = 1 indicates that the data was
recovered from a video line on an even field.
2×—This bit indicates whether the data sliced was in
Gemstar 1× or 2× format. A high indicates 2× format.
The 2× bit determines whether the raw information
retrieved from the video line was two bytes or four bytes.
The state of the GDECAD bit affects whether the bytes are
transmitted straight (that is, two bytes transmitted as two
bytes) or whether they are split into nibbles (that is, two
bytes transmitted as four half bytes). Padding bytes are
then added where necessary.
Line[3:0]—This entry provides a code that is unique for
each of the possible 16 source lines of video from which
Gemstar data may have been retrieved. Refer to Table 96
DC[1:0]—Data count value. The number of UDWs in the
packet divided by 4. The number of UDWs in any packet
must be an integral number of 4. Padding may be required
at the end, as set in ITU-R BT.1364. See Table 87.
CS[8:2]—The checksum is provided to determine the
integrity of the ancillary data packet. It is calculated by
summing up D[8:2] of DID, SDID, the data count byte, and
all UDWs and ignoring any overflow during the summation.
Because all data bytes that are used to calculate the checksum
have their two LSBs set to 0, the CS[1:0] bits are also always 0.
CS[8]—describes the logic inversion of CS[8]. The value CS[8]
is included in the checksum entry of the data packet to ensure
that the reserved values of 0x00 and 0xFF do not occur. Table 88
to Table 91 outline the possible data packages.
Gemstar_2× Format, Half-Byte Output Mode
Half-byte output mode is selected by setting GDECAD to 0;
full-byte output mode is selected by setting GDECAD to 1. See
Address 0x4C[0] section.
Gemstar_1× Format
Half-byte output mode is selected by setting CDECAD to 0,
full-byte output mode is selected by setting CDECAD to 1. See
Address 0x4C[0] section.
Table 88. Gemstar_2× Data, Half-Byte Mode
Byte
D[9]
D[8]
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
Description
0
Fixed preamble
1
Fixed preamble
2
1
Fixed preamble
3
0
1
0
1
0
DID
4
EP
EF
1
Line[3:0]
0
SDID
5
EP
0
1
0
Data count
6
EP
0
Gemstar Word1[7:4]
0
User data-words
7
EP
0
Gemstar Word1[3:0]
0
User data-words
8
EP
0
Gemstar Word2[7:4]
0
User data-words
9
EP
0
Gemstar Word2[3:0]
0
User data-words
10
EP
0
Gemstar Word3[7:4]
0
User data-words
11
EP
0
Gemstar Word3[3:0]
0
User data-words
12
EP
0
Gemstar Word4[7:4]
0
User data-words
13
EP
0
Gemstar Word4[3:0]
0
User data-words
14
CS[8]
CS[7]
CS[6]
CS[5]
CS[4]
CS[3]
CS[2]
CS[1]
CS[0]
Checksum
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| EVAL-ADV7181CLFEBZ | 制造商:Analog Devices 功能描述:EVALUATION BOARD I.C. - Boxed Product (Development Kits) |
| EVAL-ADV7181CLQEBZ | 功能描述:BOARD EVAL FOR ADV7181CLQ RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| EVAL-ADV7181DEBZ | 功能描述:EVAL BOARD FOR ADV7181D RoHS:是 類別:編程器，開(kāi)發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:- 標(biāo)準(zhǔn)包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
| EVAL-ADV7181EBM | 制造商:Analog Devices 功能描述:UNRELEASED EVAL BOARD I.C. - Bulk |
| EVAL-ADV7182EBZ | 功能描述:視頻 IC 開(kāi)發(fā)工具 EVALUATION BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Boards 類型:YPbPr to RGBHV Converters 工具用于評(píng)估:LMH1251 工作電源電壓:5 V |
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