參數(shù)資料
型號: EVAL-AD7887CB
廠商: Analog Devices, Inc.
英文描述: +2.7 V to +5.25 V, Micropower, 2-Channel, 125 kSPS, 12-Bit ADC in 8-Lead uSOIC
中文描述: 2.7 V至5.25 V,微功耗,2通道,125 kSPS的,12位ADC的8引腳uSOIC
文件頁數(shù): 5/16頁
文件大?。?/td> 133K
代理商: EVAL-AD7887CB
REV. B
AD7887
–5–
PIN FUNCT ION DE SCRIPT IONS
Pin
No.
Pin
Mnemonic
Function
1
CS
Chip Select. Active low logic input. T his input provides the dual function of initiating conversions on the
AD7887 and also frames the serial data transfer. When the AD7887 operates in its default mode, the
CS
pin
also acts as the shutdown pin such that with the
CS
pin high, the AD7887 is in its power-down mode.
Power Supply Input. T he V
DD
range for the AD7887 is from +2.7 V to +5.25 V. When the AD7887 is con-
figured for two-channel operation, this pin also provides the reference source for the part.
Ground Pin. T his pin is the ground reference point for all circuitry on the AD7887. In systems with separate
AGND and DGND planes, these planes should be tied together as close as possible to this GND pin. Where
this is not possible, this GND pin should connect to the AGND plane.
Analog Input 1/Voltage Reference Input. In single-channel mode, this pin becomes the reference input/
output. In this case, the user can either access the internal +2.5 V reference or overdrive the internal refer-
ence with the voltage applied to this pin. T he reference voltage range for an externally-applied reference is
+1.2 V to V
DD
. In two-channel mode, this pin provides the second analog input channel AIN1. T he input
voltage range on AIN1 is 0 to V
DD
.
Analog Input 0. In single-channel mode, this is the analog input and the input voltage range is 0 to V
REF
. In
dual-channel mode, it has an analog input range of 0 to V
DD
.
Data In. Logic Input. Data to be written to the AD7887’s Control Register is provided on this input and is
clocked into the register on the rising edge of SCLK (see Control Register section). T he AD7887 can be
operated as a single-channel read-only ADC by tying the DIN line permanently to GND.
Data Out. Logic Output. T he conversion result from the AD7887 is provided on this output as a serial data
stream. T he bits are clocked out on the falling edge of the SCLK input. T he data stream consists of four
leading zeros followed by the 12 bits of conversion data, which is provided MSB first.
Serial Clock. Logic Input. SCLK provides the serial clock for accessing data from the part and writing serial
data to the Control Register. T his clock input is also used as the clock source for the AD7887’s conversion
process.
2
V
DD
3
GND
4
AIN1/V
REF
5
AIN0
6
DIN
7
DOUT
8
SCLK
PIN CONFIGURAT ION
TOP VIEW
(Not to Scale)
8
7
6
5
1
2
3
4
CS
SCLK
AD7887
V
DD
GND
AIN1/V
REF
DOUT
DIN
AIN0
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