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參數(shù)資料
| 型號(hào)： | EVAL-AD7887CB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | +2.7 V to +5.25 V, Micropower, 2-Channel, 125 kSPS, 12-Bit ADC in 8-Lead uSOIC |
| 中文描述： | 2.7 V至5.25 V，微功耗，2通道，125 kSPS的，12位ADC的8引腳uSOIC |
| 文件頁(yè)數(shù)： | 10/16頁(yè) |
| 文件大?。?/td> | 133K |
| 代理商： | EVAL-AD7887CB |
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REV. B
AD7887
–10–
as the source impedance increases and performance will degrade.
Figure 10 shows a graph of the total harmonic distortion versus
analog input signal frequency for different source impedances.
INPUT FREQUENCY – kHz
–90
0.15
42.14
T
10.89
31.59
21.14
–85
–80
–75
–70
–65
49.86
THD vs. FREQUENCY FOR DIFFERENT
SOURCE IMPEDANCES
V
= 5V
5V EXT REFERENCE
R
IN
= 1k
V
, C
IN
= 100pF
R
IN
= 50
V
, C
IN
= 2.2nF
R
IN
= 10
V
, C
IN
= 10nF
Figure 10. THD vs. Analog Input Frequency
On-Chip Reference
T he AD7887 has an on-chip 2.5 V reference. T his reference can
be enabled or disabled by clearing or setting the REF bit in the
control register respectively. If the on-chip reference is to be
used externally in a system then it must be buffered before it is
applied elsewhere. If an external reference is applied to the
device, then the internal reference is automatically overdriven.
However, it is advised to disable the internal reference by setting
the REF bit in the control register when an external reference is
applied in order to obtain optimum performance from the de-
vice. When the internal reference is disabled, SW1 in Figure 11
will open and the input impedance seen at the AIN1/V
REF
pin is
the input impedance of the reference buffer, which is in the
region of gigaohms. When the internal reference is enabled the
input impedance seen at the pin is typically 10 k
. When the
AD7887 is operated in two-channel mode, the reference is taken
from V
DD
internally and not from the on-chip 2.5 V reference.
2.5V
10k
V
SW1
AIN1/V
REF
Figure 11. On-Chip Reference Circuitry
POWE R-DOWN OPT IONS
T he AD7887 provides flexible power management to allow the
user to achieve the best power performance for a given through-
put rate.
T he power management options are selected by programming
the power management bits (i.e., PM1 and PM0) in the control
register. T able II summarizes the available options. When the
power management bits are programmed for either of the auto
power-down modes, the part will enter power-down mode on
the 16th rising SCLK edge after the falling edge of
CS
. T he
first falling SCLK edge after the
CS
falling edge will cause the
part to power up again. When the AD7887 is in Mode 1, i.e.,
PM1 = PM0 = 0, the part will enter shutdown on the rising
edge of
CS
and power up from shutdown on the falling edge of
CS
. If
CS
is brought high during the conversion in this mode,
the part will immediately enter shutdown.
Power-Up T imes
T he AD7887 has an approximate 1
μ
s power-up time when
powering up from standby or when using an external reference.
When V
DD
is first connected the AD7887 will power up in
Mode 1, i.e., PM1 = PM0 = 0. T he part is put into shutdown
on the rising edge of
CS
in this mode. A subsequent power-up
from shutdown will take approximately 5
μ
s. T he AD7887
wake-up time is very short in the autostandby mode so it is
possible to wake-up the part and carry out a valid conversion in
the same read/write operation.
POWE R VS. T HROUGHPUT RAT E
By operating the AD7887 in autoshutdown, autostandby mode
or Mode 1, the average power consumption of the AD7887
decreases at lower throughput rates. Figure 12 shows how, as
the throughput rate is reduced, the device remains in its power-
down state longer and the average power consumption over time
drops accordingly.
For example if the AD7887 is operated in a continuous sam-
pling mode with a throughput rate of 10 kSPS and a SCLK of
2 MHz (V
DD
= 5 V), and if PM1 = 1 and PM0 = 0, i.e., the
device is in autoshutdown mode, and the on-chip reference is
used, the power consumption is calculated as follows. T he power
dissipation during normal operation is 3.5 mW (V
DD
= 5 V). If
the power-up time is 5
μ
s, and the remaining conversion plus
acquisition time is 15.5 t
SCLK
, i.e., approximately 7.75
μ
s, (see
Figure 15a), the AD7887 can be said to dissipate 3.5 mW for
12.75
μ
s during each conversion cycle. If the throughput rate is
10 kSPS, the cycle time is 100
μ
s and the average power dissi-
pated during each cycle is (12.75/100)
×
(3.5 mW) = 446.25
μ
W.
If V
DD
= 3 V, SCLK = 2 MHz and the device is again in auto-
shutdown mode using the on-chip reference, then the power
dissipation during normal operation is 2.1 mW. T he AD7887
can now be said to dissipate 2.1 mW for 12.75
μ
s during each
conversion cycle. With a throughput rate of 10 kSPS, the aver-
age power dissipated during each cycle is (12.75/100)
×
(2.1 mW)
= 267.75
μ
W. Figure 12 shows the Power vs. T hroughput Rate
for automatic shutdown with both 5 V and 3 V supplies.
THROUGHPUT – kSPS
10
0
P
1
10
0.1
0.01
V
= 5V
SCLK = 2MHz
V
= 3V
SCLK = 2MHz
20
30
40
50
Figure 12. Power vs. Throughput
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-AD7887CB4 | 制造商:AD 制造商全稱:Analog Devices 功能描述:2.7 V to 5.25 V, Micropower, 2-Channel, 125 kSPS, 12-Bit ADC in 8-Lead MSOP |
| EVAL-AD7887CBZ | 功能描述:BOARD EVAL FOR AD7887 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估板 - 模數(shù)轉(zhuǎn)換器 (ADC) 系列:* 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- ADC 的數(shù)量:1 位數(shù):12 采樣率（每秒）:94.4k 數(shù)據(jù)接口:USB 輸入范圍:±VREF/2 在以下條件下的電源（標(biāo)準(zhǔn)）:- 工作溫度:-40°C ~ 85°C 已用 IC / 零件:MAX11645 已供物品:板，軟件 |
| EVAL-AD7888CB | 制造商:Analog Devices 功能描述:EVAL KIT FOR 2.7 V TO 5.25 V, MICROPWR, 8CH, 125 KSPS, 12-BI - Bulk |
| EVAL-AD7890-2 | 制造商:Analog Devices 功能描述:AD7890 EVAL BOARD |
| EVAL-AD7891-1CB | 制造商:Analog Devices 功能描述:Evaluation Board For LC2MOS 8-Channel, 12-Bit High Speed Data Acquisition System 44PLCC 制造商:Analog Devices 功能描述:EVAL BD FOR LC2MOS 8CH, 12-BIT HS DATA ACQ SYS 44PLCC(P-44A) - Bulk |
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